> On 15 Oct 2026, at 6:42 PM, Eric Auger <[email protected]> wrote: > > !-------------------------------------------------------------------| > CAUTION: External Email > > |-------------------------------------------------------------------! > > Hi Khushit, > > On 9/21/26 2:32 PM, Khushit Shah wrote: >> Under KVM, the guest PMU is backed by the host PMU (event set, PMCR.N, >> and PMCEID), which may not be portable across heterogeneous hosts. >> >> Disable PMU support for named CPU models by clearing ARM_FEATURE_PMU in >> the named-model init path so arm_cpu_post_init() does not create the >> "pmu" property. > > To me it shall be possible to turn PMU on even on named model. I > understand it may create migration issues due to the HW adherence but yet. > I think on x86 you can use -cpu Haswell-IBRS,pmu=on. > Okay, fixed in v5.
Thanks, Khushit > Eric > > >> >> Signed-off-by: Khushit Shah <[email protected]> >> --- >> target/arm/cpu-models.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/target/arm/cpu-models.c b/target/arm/cpu-models.c >> index fed3197186..153ee10ae6 100644 >> --- a/target/arm/cpu-models.c >> +++ b/target/arm/cpu-models.c >> @@ -159,6 +159,10 @@ static void arm_named_cpu_initfn(Object *obj) >> /* 1.b Properly set RES1 fields. */ >> reset_res1_fields(cpu); >> >> + /* Disable PMU for named CPU models. */ >> + unset_feature(&cpu->env, ARM_FEATURE_PMU); >> + cpu->has_pmu = false; >> + >> /* 2. Add sveNNNN and SYSREG_ properties */ >> aarch64_add_sve_properties(obj); >> aarch64_add_idregs_properties(obj); >
