Currently we provide multiple different ways that targets can implement
the basic "deal with a softmmu TLB miss" functionality:
(1) Implement TCGCPUOps::tlb_fill_align, which passes an argument
CPUTLBEntryFull *out which the target code must fill in with the
info about the TLB entry to add
(2) Implement TCGCPUOps::tlb_fill, and in your implementation call
tlb_set_page_full, passing it a CPUTLBEntryFull *full with the
info about the TLB entry
(3) Like 2, but call tlb_set_page_with_attrs(), which is a trivial
wrapper round tlb_set_page_full()
(4) Like 2, but call tlb_set_page(), which is a trivial wrapper
round tlb_set_page_attrs()
Currently Arm and hppa do (1). sparc does (2). i386 and microblaze
do (3). Other targets all do (4).
If we wanted to try to reduce the number of ways we're providing
to do this, what is our preferred destination? Moving i386 and
microblaze from tlb_set_page_with_attrs() to tlb_set_page_full()
would be easy, for instance, but should we move them directly to
tlb_fill_align instead? Or is the idea that you only implement
tlb_fill_align if you need to care about the priority of alignment
vs other faults, and implementing tlb_fill is fine if you're OK
with the default "check alignment fault before page fault" ?
(Updating all the "type (4)" architectures might not be worth
the effort, but I feel like we could at least rationalize the
type (3) cases and maybe type (2).)
thanks
-- PMM
