On 17.08.2012 14:56, Jan Kiszka wrote: > This MMIO area is an entry gate to legacy PC ISA devices, addressed via > PIO over there. Quite a few of the PIO ports have side effects on access > like starting/stopping timers that must be executed properly ordered > /wrt the CPU. So we have to remove the coalescing mark.
This appears to be 1.1-stable material right? Thanks, /mjt
