Seperate the PCI stuff from the EHCI components. Extracted the PCIDevice
out into a new wrapper struct to make EHCIState non-PCI-specific. Seperated
tho non PCI init component out into a seperate "common" init function.
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
---
Changed from v2:
s/ehci_properties/ehci_pci_properties
Got rid of the union and made EHCIItfState PCI specific
s/EHCIItfState/EHCIPCIState
usb_ehci_initfn: Pass in EHCI info. This means this function doesnt need to do
any Class casting mkaing it generic and not needing the old union.
Changed from v1:
renamed VMSD defintions to preserve backwards compatibility (Gerd Review)
hw/usb/hcd-ehci.c | 135 ++++++++++++++++++++++++++++++-----------------------
1 files changed, 77 insertions(+), 58 deletions(-)
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index f4c2884..df224b2 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -386,7 +386,6 @@ struct EHCIQueue {
typedef QTAILQ_HEAD(EHCIQueueHead, EHCIQueue) EHCIQueueHead;
struct EHCIState {
- PCIDevice dev;
USBBus bus;
qemu_irq irq;
MemoryRegion mem;
@@ -446,6 +445,11 @@ struct EHCIState {
uint32_t async_stepdown;
};
+typedef struct EHCIPCIState {
+ PCIDevice pcidev;
+ EHCIState ehci;
+} EHCIPCIState;
+
#define SET_LAST_RUN_CLOCK(s) \
(s)->last_run_ns = qemu_get_clock_ns(vm_clock);
@@ -2539,7 +2543,7 @@ static const MemoryRegionOps ehci_mmio_port_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static int usb_ehci_initfn(PCIDevice *dev);
+static int usb_ehci_pci_initfn(PCIDevice *dev);
static USBPortOps ehci_port_ops = {
.attach = ehci_attach,
@@ -2600,12 +2604,11 @@ static void usb_ehci_vm_state_change(void *opaque, int
running, RunState state)
}
static const VMStateDescription vmstate_ehci = {
- .name = "ehci",
+ .name = "ehci-core",
.version_id = 2,
.minimum_version_id = 1,
.post_load = usb_ehci_post_load,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE(dev, EHCIState),
/* mmio registers */
VMSTATE_UINT32(usbcmd, EHCIState),
VMSTATE_UINT32(usbsts, EHCIState),
@@ -2636,8 +2639,19 @@ static const VMStateDescription vmstate_ehci = {
}
};
-static Property ehci_properties[] = {
- DEFINE_PROP_UINT32("maxframes", EHCIState, maxframes, 128),
+static const VMStateDescription vmstate_ehci_pci = {
+ .name = "ehci",
+ .version_id = 2,
+ .minimum_version_id = 1,
+ .post_load = usb_ehci_post_load,
+ .fields = (VMStateField[]) {
+ VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
+ VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
+ }
+};
+
+static Property ehci_pci_properties[] = {
+ DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
DEFINE_PROP_END_OF_LIST(),
};
@@ -2651,28 +2665,28 @@ typedef struct EHCIPCIClass {
EHCIInfo ehci;
} EHCIPCIClass;
-static void ehci_class_init(ObjectClass *klass, void *data)
+static void ehci_pci_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
EHCIPCIClass *k = (EHCIPCIClass *)klass;
EHCIPCIClass *template = data;
- k->pci.init = usb_ehci_initfn;
+ k->pci.init = usb_ehci_pci_initfn;
k->pci.vendor_id = template->pci.vendor_id;
k->pci.device_id = template->pci.device_id; /* ich4 */
k->pci.revision = template->pci.revision;
k->pci.class_id = PCI_CLASS_SERIAL_USB;
k->ehci = template->ehci;
- dc->vmsd = &vmstate_ehci;
- dc->props = ehci_properties;
+ dc->vmsd = &vmstate_ehci_pci;
+ dc->props = ehci_pci_properties;
}
static TypeInfo ehci_info[] = {
{
.name = "usb-ehci",
.parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(EHCIState),
- .class_init = ehci_class_init,
+ .instance_size = sizeof(EHCIPCIState),
+ .class_init = ehci_pci_class_init,
.class_size = sizeof(EHCIPCIClass),
.class_data = (EHCIPCIClass[]) {{
.pci.vendor_id = PCI_VENDOR_ID_INTEL,
@@ -2684,8 +2698,8 @@ static TypeInfo ehci_info[] = {
}, {
.name = "ich9-usb-ehci1",
.parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(EHCIState),
- .class_init = ehci_class_init,
+ .instance_size = sizeof(EHCIPCIState),
+ .class_init = ehci_pci_class_init,
.class_size = sizeof(EHCIPCIClass),
.class_data = (EHCIPCIClass[]) {{
.pci.vendor_id = PCI_VENDOR_ID_INTEL,
@@ -2697,46 +2711,14 @@ static TypeInfo ehci_info[] = {
},
};
-static int usb_ehci_initfn(PCIDevice *dev)
+static void usb_ehci_initfn(EHCIState *s, DeviceState *dev, EHCIInfo *ei)
{
- EHCIState *s = DO_UPCAST(EHCIState, dev, dev);
- EHCIPCIClass *c = (EHCIPCIClass *)object_get_class(OBJECT(dev));
- uint8_t *pci_conf = s->dev.config;
int i;
- pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
-
- /* capabilities pointer */
- pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
- //pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50);
-
- pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
- pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
- pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
-
- // pci_conf[0x50] = 0x01; // power management caps
-
- pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); // release number (2.1.4)
- pci_set_byte(&pci_conf[0x61], 0x20); // frame length adjustment (2.1.5)
- pci_set_word(&pci_conf[0x62], 0x00); // port wake up capability (2.1.6)
-
- pci_conf[0x64] = 0x00;
- pci_conf[0x65] = 0x00;
- pci_conf[0x66] = 0x00;
- pci_conf[0x67] = 0x00;
- pci_conf[0x68] = 0x01;
- pci_conf[0x69] = 0x00;
- pci_conf[0x6a] = 0x00;
- pci_conf[0x6b] = 0x00; // USBLEGSUP
- pci_conf[0x6c] = 0x00;
- pci_conf[0x6d] = 0x00;
- pci_conf[0x6e] = 0x00;
- pci_conf[0x6f] = 0xc0; // USBLEFCTLSTS
-
- s->opregbase = c->ehci.opregbase;
+ s->opregbase = ei->opregbase;
/* 2.2 host controller interface version */
- s->caps[0x00] = (uint8_t)(s->opregbase - c->ehci.capabase);
+ s->caps[0x00] = (uint8_t)(ei->opregbase - ei->capabase);
s->caps[0x01] = 0x00;
s->caps[0x02] = 0x00;
s->caps[0x03] = 0x01; /* HC version */
@@ -2749,11 +2731,7 @@ static int usb_ehci_initfn(PCIDevice *dev)
s->caps[0x0a] = 0x00;
s->caps[0x0b] = 0x00;
- s->irq = s->dev.irq[3];
-
- s->dma = pci_dma_context(dev);
-
- usb_bus_new(&s->bus, &ehci_bus_ops, &s->dev.qdev);
+ usb_bus_new(&s->bus, &ehci_bus_ops, dev);
for(i = 0; i < NB_PORTS; i++) {
usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
USB_SPEED_MASK_HIGH);
@@ -2777,12 +2755,53 @@ static int usb_ehci_initfn(PCIDevice *dev)
memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
"ports", PORTSC_END - PORTSC_BEGIN);
- memory_region_add_subregion(&s->mem, c->ehci.capabase, &s->mem_caps);
- memory_region_add_subregion(&s->mem, s->opregbase, &s->mem_opreg);
- memory_region_add_subregion(&s->mem, s->opregbase + PORTSC_BEGIN,
+ memory_region_add_subregion(&s->mem, ei->capabase, &s->mem_caps);
+ memory_region_add_subregion(&s->mem, ei->opregbase, &s->mem_opreg);
+ memory_region_add_subregion(&s->mem, ei->opregbase + PORTSC_BEGIN,
&s->mem_ports);
+}
+
+static int usb_ehci_pci_initfn(PCIDevice *dev)
+{
+ EHCIPCIState *i = DO_UPCAST(EHCIPCIState, pcidev, dev);
+ EHCIPCIClass *c = (EHCIPCIClass *)object_get_class(OBJECT(dev));
+ EHCIState *s = &i->ehci;
+ uint8_t *pci_conf = dev->config;
+
+ pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
+
+ /* capabilities pointer */
+ pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
+ /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
+
+ pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
+ pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
+ pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
+
+ /* pci_conf[0x50] = 0x01; *//* power management caps */
+
+ pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
+ pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
+ pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
+
+ pci_conf[0x64] = 0x00;
+ pci_conf[0x65] = 0x00;
+ pci_conf[0x66] = 0x00;
+ pci_conf[0x67] = 0x00;
+ pci_conf[0x68] = 0x01;
+ pci_conf[0x69] = 0x00;
+ pci_conf[0x6a] = 0x00;
+ pci_conf[0x6b] = 0x00; /* USBLEGSUP */
+ pci_conf[0x6c] = 0x00;
+ pci_conf[0x6d] = 0x00;
+ pci_conf[0x6e] = 0x00;
+ pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
+
+ s->irq = dev->irq[3];
+ s->dma = pci_dma_context(dev);
- pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
+ usb_ehci_initfn(s, DEVICE(dev), &c->ehci);
+ pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
return 0;
}
--
1.7.0.4
