Document it for the IBM 43p emulation. Signed-off-by: Hervé Poussineau <hpous...@reactos.org> --- docs/ibm_43p.cfg | 3 + hw/ppc/Makefile.objs | 1 + hw/ppc/rs6000_debug.c | 260 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 264 insertions(+) create mode 100644 hw/ppc/rs6000_debug.c
diff --git a/docs/ibm_43p.cfg b/docs/ibm_43p.cfg index cf80b89..92c9e8f 100644 --- a/docs/ibm_43p.cfg +++ b/docs/ibm_43p.cfg @@ -32,3 +32,6 @@ iobase = "0x170" iobase2 = "0x376" irq = "15" + +[device] + driver = "rs6000-debug" diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 4de0209..8be8264 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -23,6 +23,7 @@ obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-y += ppc405_boards.o ppc4xx_devs.o ppc405_uc.o ppc440_bamboo.o # PReP obj-y += prep.o +obj-y += rs6000_debug.o # OldWorld PowerMac obj-y += mac_oldworld.o # NewWorld PowerMac diff --git a/hw/ppc/rs6000_debug.c b/hw/ppc/rs6000_debug.c new file mode 100644 index 0000000..d7b8721 --- /dev/null +++ b/hw/ppc/rs6000_debug.c @@ -0,0 +1,260 @@ +/* + * QEMU IBM RS/6000 debug port emulation + * + * Copyright (c) 2011 Hervé Poussineau + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) version 3 or any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "hw/isa.h" +#include "char/char.h" + +#define TYPE_RS6000_DEBUG "rs6000-debug" +#define RS6000(obj) \ + OBJECT_CHECK(rs6000DebugState, (obj), TYPE_RS6000_DEBUG) + +static struct { + uint8_t code; + const char* message; +} checkpoints[] = { + { 0x00, "Manufacturing - Reserved for Parallel port download protocol" }, + { 0x01, "Clear the EPOW register 1. Memory modules 2. system board" }, + { 0x02, "Determine system bus speed, set ISA advisor" }, + { 0x04, "Set memory refresh" }, + { 0x05, "Transfer control to Operating System ( normal boot )" }, + { 0x06, "Jump to set environment or check flash" }, + { 0x08, "Run recovery block base memory, test 2k, then set stack" }, + { 0x09, "Copy CRC verification code to RAM" }, + { 0x0A, "Turn on cache" }, + { 0x0B, "Flush cache" }, + { 0x0C, "Jump to CRC verification code in RAM" }, + { 0x0D, "Compute composite image CRC" }, + { 0x0E, "Jump back to ROM" }, + { 0x0F, "Turn off cache" }, + { 0x10, "Check if composite image CRC is valid" }, + { 0x11, "Good CRC - jump to composite image" }, + { 0x12, "Bad CRC - initialize base memory, stack" }, + { 0x13, "Bad CRC - copy uncompressed recovery block code to RAM" }, + { 0x14, "Bad CRC - jump to code in RAM" }, + { 0x15, "Bad CRC - turn on cache" }, + { 0x16, "Bad CRC - copy recovery block data section to RAM" }, + { 0x17, "Bad CRC - invalidate and flush cache, set TOC" }, + { 0x18, "Bad CRC - branch to high level recovery control routine" }, + { 0x19, "Initialize base memory, stack" }, + { 0x1A, "Copy uncompressed recovery block code to RAM" }, + { 0x1B, "Jump to code in RAM" }, + { 0x1C, "Turn on cache" }, + { 0x1D, "Copy recovery block data section to RAM" }, + { 0x1E, "Invalidate and flush cache, set TOC" }, + { 0x1F, "Branch to high level control routine" }, + { 0x20, "Initialize system I/O" }, + { 0x21, "Run a console diagnostic routine" }, + { 0x22, "No memory found" }, + { 0x23, "No DIMM found in socket" }, + { 0x24, "Remove bad DIMM found from DIMM information" }, + { 0x25, "Unsupported DIMM detected" }, + { 0x26, "Check valid image - start" }, + { 0x27, "Check valid image - successful" }, + { 0x28, "Wait for interrupt" }, + { 0x29, "Transfers information to the business audio chip" }, + { 0x2B, "Wait until sound chip has been initialized" }, + { 0x2C, "Initialize the current input/pointer device" }, + { 0x2D, "Initialize the current output" }, + { 0x2E, "Register a console driver" }, + { 0x30, "Set up early memory allocation heap, initialize Super I/O" }, + { 0x31, "Determine system bus speed, set ISA driver" }, + { 0x32, "Resync to SP (Console image)" }, + { 0x33, "Set memory refresh" }, + { 0x35, "Jump to set environment" }, + { 0x40, "Initialize interrupt subsystem and 8259s" }, + { 0x41, "SP command setup" }, + { 0x42, "SP mailbox interface" }, + { 0x43, "get_vpd entry" }, + { 0x44, "init_sp entry" }, + { 0x45, "sp_recovery -> resync SP & CPU" }, + { 0x46, "IRQ13 stuck high Bad System Board or Service Processor" }, + { 0x47, "Entry to error checking routine-No system board VPD, bad CRC Bad System Board" }, + { 0x48, "Power supply or system board problem" }, + { 0x49, "Voltage problem, system board, power supply or CPU 5V" }, + { 0x4A, "Voltage problem, system board or power supply 12V" }, + { 0x4B, "CPU over temperature or bad system board" }, + { 0x4C, "start bit-map display function" }, + { 0x4D, "Bit-map file read into memory, start processing" }, + { 0x4E, "End bit-map display function" }, + { 0x4F, "IO/MEM over termperature or bad system board" }, + { 0x50, "Initialize CMOS RTC periodic interrupt" }, + { 0x51, "System board or system over temperature, CPU card Critical " }, + { 0x52, "Bad system board (fan fail reported)" }, + { 0x53, "Bad system board or Fans" }, + { 0x54, "Fan fail warning" }, + { 0x55, "Bad system board (unsupported EPOW)" }, + { 0x56, "Voltage problem, system board, power supply or CPU 3.3V/2.5V" }, + { 0x57, "Bad or low battery" }, + { 0x58, "IRQ13 test failure" }, + { 0x59, "EPOW test failure" }, + { 0x5A, "Spurious IRQ6 interrupt (i.e. interrupt glitch)" }, + { 0x5B, "Fan failure warning" }, + { 0x5B, "Transfer control to Operating System ( service mode bootlist )" }, + { 0x5C, "Clear EPOW register failure" }, + { 0x5D, "Clear EPOW register failure" }, + { 0x60, "Initialize keyboard/mouse controller, and password" }, + { 0x61, "Extended memory initialization command" }, + { 0x62, "Diskette initialization command" }, + { 0x64, "Test of day routine" }, + { 0x6A, "SCSI initialization command" }, + { 0x70, "Initialize debugger" }, + { 0x71, "Start checking whether CMOS contents are valid" }, + { 0x72, "End checking whether CMOS contents are valid" }, + { 0x73, "Dumps contents of CMOS data area to a file" }, + { 0x74, "Establishing Host conmnection" }, + { 0x75, "BootP request" }, + { 0x77, "Resync to SP (Recvoery image)" }, + { 0x79, "Dupms contents of NVRAM data area to a file" }, + { 0x7A, "NVRAM initialization" }, + { 0x7B, "Check NVRAM validity CRC" }, + { 0x7C, "Loads contents of CMOS from file" }, + { 0x80, "Initialize system call table" }, + { 0x82, "Register a manager for use by the system" }, + { 0x88, "Halt. System locked by error condition - power off" }, + { 0x90, "Initialize VDISK file system" }, + { 0x91, "Low-level initialize VDISK file systems" }, + { 0x94, "Start SCSI initialization" }, + { 0x96, "SCSI bus scan start" }, + { 0x97, "SCSI polling interrupt" }, + { 0x98, "SCSI device detected" }, + { 0x9E, "Real Time clock RTC initialization" }, + { 0x9F, "Exit SCSI initialization" }, + { 0xA0, "Start resident monitor, run V:autoexec.6md" }, + { 0xA1, "Enter resident monitor" }, + { 0xA2, "Resident monitor process" }, + { 0xA3, "Resident monitor process" }, + { 0xA4, "Exit resident monitor" }, + { 0xA5, "ASCII terminal initialization" }, + { 0xA6, "ASCII terminal initialization exit" }, + { 0xA9, "p9 driver initialization" }, + { 0xAA, "p9 driver exit" }, + { 0xAB, "Keyboard driver initialization" }, + { 0xAC, "Keyboard driver exit" }, + { 0xAD, "Mouse driver initialization" }, + { 0xAE, "Mouse driver exit" }, + { 0xB0, "Initialize rest of file system" }, + { 0xB1, "Diskette initialization" }, + { 0xB2, "Diskette drive type determination" }, + { 0xB3, "Diskette initialization complete" }, + { 0xC0, "Check if flash ROM OK" }, + { 0xCA, "Build boot table - Networks" }, + { 0xCB, "Build boot table - DASD" }, + { 0xCC, "Build boot table - CDROM" }, + { 0xCD, "Build boot table - diskettes" }, + { 0xCE, "No operating system boot, exit normal boot sequence" }, + { 0xD0, "Start of boot sequence" }, + { 0xD2, "No operating system boot - ensure CMOS RTC periodic clock updates displayed" }, + { 0xD4, "Initialize console for loading diagnostics" }, + { 0xD8, "Exit from diagnostic - run resident monitor" }, + { 0xDA, "IRQ15" }, + { 0xDB, "Unexpected processor exception" }, + { 0xDC, "Dynamic console selection" }, + { 0xDD, "Early processor exception" }, + { 0xDE, "Alternating pattern of FDE and FDA indicates a processor exception has been detected." }, + { 0xE1, "Test timeout" }, + { 0xE2, "Initialize system I/O" }, + { 0xE4, "Initialize super I/O with default values" }, + { 0xE6, "Set up early memory allocation heap" }, + { 0xE8, "Initialize primary diskette drive in polled mode" }, + { 0xEA, "Try to load in recovery image from diskette" }, + { 0xEB, "Verify recovery image is valid" }, + { 0xEC, "Get recovery image entry point" }, + { 0xED, "Invalidate instruction cache" }, + { 0xEE, "Jump to composite image" }, + { 0xF0, "Manufacturing - Check for parallel port hook" }, + { 0xF4, "Manufacturing - Start flag not received" }, + { 0xF5, "Manufacturing - Invalid start flag received" }, + { 0xF6, "Manufacturing - Receive character timeout" }, + { 0xF7, "Manufacturing - CRC value mismatch" }, + { 0xFA, "Error during flash update" }, + { 0xFC, "Operating system boot - no errors reported by IPL ROS" }, + { 0xFD, "Operating system boot - non-critical errors reported by IPL ROS" }, + { 0xFE, "No boot - critical error(s) reported by IPL ROS -or- F1 key pressed" }, + { 0, NULL }, +}; + +typedef struct rs6000DebugState { + ISADevice dev; + MemoryRegion io; + CharDriverState *chr; +} rs6000DebugState; + +static void rs6000_debug_write(void *opaque, hwaddr addr, uint64_t val, + unsigned int size) +{ + rs6000DebugState *s = opaque; + uint8_t code = val & 0xff; + int i = 0; + + while (checkpoints[i].message) { + if (checkpoints[i].code == code) { + qemu_chr_fe_printf(s->chr, "%s\r\n", + checkpoints[i].message); + return; + } + i++; + } + + qemu_chr_fe_printf(s->chr, "unknown code 0x%02x\r\n", code); +} + +static const MemoryRegionOps rs6000_debug_ops = { + .write = rs6000_debug_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static int rs6000_debug_init(ISADevice *dev) +{ + rs6000DebugState *s = RS6000(dev); + + if (!s->chr) { + s->chr = qemu_chr_new("rs6000_debug", "vc", NULL); + } + + memory_region_init_io(&s->io, &rs6000_debug_ops, s, "rs6000-debug", 4); + isa_register_ioport(dev, &s->io, 0x680); + return 0; +} + +static Property rs6000_debug_properties[] = { + DEFINE_PROP_CHR("chardev", rs6000DebugState, chr), + DEFINE_PROP_END_OF_LIST(), +}; + +static void rs6000_debug_class_initfn(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); + ic->init = rs6000_debug_init; + dc->props = rs6000_debug_properties; +} + +static TypeInfo rs6000_debug_isa_info = { + .name = TYPE_RS6000_DEBUG, + .parent = TYPE_ISA_DEVICE, + .instance_size = sizeof(rs6000DebugState), + .class_init = rs6000_debug_class_initfn, +}; + +static void rs6000_debug_register_types(void) +{ + type_register_static(&rs6000_debug_isa_info); +} + +type_init(rs6000_debug_register_types) -- 1.7.10.4
