在 2013-04-08一的 10:21 +0100，Peter Maydell写道：
> On 8 April 2013 01:32, li guang <lig.f...@cn.fujitsu.com> wrote:
> > 在 2013-04-05五的 10:23 +0100，Peter Maydell写道：
> >> QEMU is fundamentally modelling real hardware platforms,
> >> not abstract devices. You have to model a real power
> >> controller to at least some extent, because that's what
> >> guest OSes expect to be interacting with, and what
> >> device and board hardware models expect to be dealing with.
> >
> > Hmm, let me see ...
> > but you know, in my mind OS mostly dose not care more about power
> > controller, for example, if OS want to reset, it just issues a command
> > or writes a special value to register in a chip(not power controller),
> > like PC, one of reset path is to issue a KBC reset command to IO
> > register 0x64. so it seems OS has no idea about power controller(chip),
>
> This is architecture specific, which is my point. You can
> provide generic mechanisms for making it easier to implement
> power control, but you have to be clear about what is generic
> (and optional) mechanism and what is board and hardware specific.
>
The approach of power-control may be specific for architectures,
but, I think the thought beneath is common, e.g. for some ARM and MIPS
platforms, OS issue commands to a embedded controller's firmware,
then this firmware will help to do the real power-control job(
on/off, of course no suspend), and also, there are some platforms
directly generate power signals on some specific GPIOs then,
these signals via a power chip will affect other devices.
1. 2.
----- -----
| OS | | OS |
--+-- -----
|on/off |on/off
---------------------------------------------
| -----+----- -----+----- |
| | firmware | | GPIO | |
| -----+----- -----+----- |
---------+----------------- | | part 2
|on/off | |on/off |
+------+------+ | ----+----- |
| | | | |power chip| |
------ ----- ---- | ---------- |
| dev0 ||dev1 ||dev2| --------|on/off---
------ ----- ---- +------+------+
| | |
------ ----- ----
| dev0 ||dev1 ||dev2|
------ ----- ----
so, in graph 1, firmware acts like the power chip and related gpios
in graph 2, then, I boldly assume a conceptual power chip exist,
it can either be part 2 of graph 1 or 2.
as you said, qemu should only model real hardware,
I am confused, can the demonstration above part 2 be consider a
real hardware? but it does not have vendor and dev-id ...
and it's not real hardware? but it dose work just same with
real hardware.
