Joachim Henke-5 wrote: > > The attached patch adds the 3DNow! and extented 3DNow! instruction > sets to qemu. I wrote this just according to the manuals from AMD, > since I don't have an AMD processor for testing (which was actually > my motivation to create this patch). > > Please note that (like with the SSE emulation) the rounding for the > floating point operations isn't exact in every case. But the > precision should be sufficient for typical applications. > > The CPUID is also extented by the bit for extented MMX, which is a > subset of SSE and already implemented in qemu. >
Rediffed the patch to apply to the current 0.9.1 release. Additionally I've added a cpu definition that makes use of the 3dnow! flag. With this patch I am able to load and run recent linux kernels compiled for for the K7 32-bit architecture. Newer kernels test the cpu feature flags and thus require certain feature flags to be present on the target cpu [1]. But I didn't do further testing on the emulated instructions itself so far. Regards, Michael [1] http://kerneltrap.org/node/11754 http://www.nabble.com/file/p16092150/3dnow.patch.gz 3dnow.patch.gz -- View this message in context: http://www.nabble.com/-PATCH--3DNow%21-instruction-set-emulation-tp10244711p16092150.html Sent from the QEMU - Dev mailing list archive at Nabble.com.
