On Wed, Apr 24, 2013 at 02:36:46PM +0200, Paolo Bonzini wrote: > Il 24/04/2013 14:01, David Gibson ha scritto: > > In commit 1c380f9460522f32c8dd2577b2a53d518ec91c6d "pci: honor > > PCI_COMMAND_MASTER" the PCI_COMMAND_MASTER bit of the PCI command register > > was implemented by toggling the enable bit on a memory region alias > > interposed between the PCI device's dma address space and the main > > system memory region. > > > > Introducing an extra alias region for every PCI device just to implement > > that bit seems like serious overkill. Furthermore, it doesn't work when > > there's a (guest side) iommu present, since that uses a different path for > > constructing the PCI device's dma address space. > > > > This patch removes the aliased window, instead implementing > > PCI_COMMAND_MASTER with tests in the PCI DMA functions. > > > > Signed-off-by: David Gibson <da...@gibson.dropbear.id.au> > > This doesn't work.
Well.. say rather that it fails to work in a different set of
circumstances from those in which the current scheme fails to work.
> You have no guarantee that PCI devices use the PCI DMA functions. The
> device could just pass the DMAContext to another function, and indeed
> the OHCI controller does exactly that.
Ah, good point. Drat.
> This will be even simpler after IOMMU/DMAContext are also unified in the
> AddressSpace framework.
>
> Paolo
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
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