On Mon, May 13, 2013 at 02:23:30PM +0200, Paolo Bonzini wrote: > Il 13/05/2013 12:54, David Gibson ha scritto: > > Specifically the way the iommu is > > determined from a callback in the PCIBus means that it won't be > > assigned for devices under a PCI-PCI bridge. > > Right. I saw the report from Alexey, but I am a bit wary of touching it > because it's not a regression. In fact there is even a FIXME for it: > > /* FIXME: inherit memory region from bus creator */
Uh.. sort of. > Perhaps we can make pci_iommu_as a Bus method, where the default > implementation looks up along the chain, and the end of the recursion is > in SysBus or in PCI buses that have set the callback. So, this is complicated by the fact that there are two cases, and they can both be found in existing hardware. 1) One is where devices behind the bridge are not visible / differentiable to the IOMMU, and so effectively all their DMAs originate from the bridge device itself. In this case the correct thing is to give all devices under the bridge the same DMA AddressSpace as the bridge device, as suggested by the FIXME. This will be typical behaviour for PCI-E to PCI bridges. 2) The other case is where the bridge passes through RIDs, so that the IOMMU can still differentiate devices behind it. For this case, we really want the hook to be in the host bridge / root bus, and it can make a decision based on the full bus/dev/fn information. This will be typical for PCI-E to PCI-E bridges (or switches or nexuses or whatever they're usually called for PCI-E). This case will be very important as we start to model newer PCI-E based machines by default, where typically *all* devices are behind a logical p2p bridge inside the root complex (but are still differentiable by the Intel IOMMU amongst others). I'm not sure at this stage how to properly handle both cases. -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
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