Thank you guys for your support! Best regards, Vincenzo
2013/8/6 Stefan Hajnoczi <stefa...@gmail.com>: > On Fri, Aug 02, 2013 at 06:30:52PM +0200, Vincenzo Maffione wrote: >> This patch partially implements the e1000 interrupt mitigation mechanisms. >> Using a single QEMUTimer, it emulates the ITR register (which is the newer >> mitigation register, recommended by Intel) and approximately emulates >> RADV and TADV registers. TIDV and RDTR register functionalities are not >> emulated (RDTR is only used to validate RADV, according to the e1000 specs). >> >> RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation >> mechanism and would need a timer each to be completely emulated. However, >> a single timer has been used in order to reach a good compromise between >> emulation accuracy and simplicity/efficiency. >> >> The implemented mechanism can be enabled/disabled specifying the command >> line e1000-specific boolean parameter "mitigation", e.g. >> >> qemu-system-x86_64 -device e1000,mitigation=on,... ... >> >> For more information, see the Software developer's manual at >> http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf. >> >> Interrupt mitigation boosts performance when the guest suffers from >> an high interrupt rate (i.e. receiving short UDP packets at high packet >> rate). For some numerical results see the following link >> http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf >> >> Signed-off-by: Vincenzo Maffione <v.maffi...@gmail.com> >> --- >> Added pc-*-1.7 machines (default machine moved to pc-i440fx-1.7). >> >> hw/i386/pc_piix.c | 18 ++++++- >> hw/i386/pc_q35.c | 16 ++++++- >> hw/net/e1000.c | 131 >> +++++++++++++++++++++++++++++++++++++++++++++++++-- >> include/hw/i386/pc.h | 8 ++++ >> 4 files changed, 167 insertions(+), 6 deletions(-) > > Great, thanks for working with us on the migration details, Vincenzo! > > Thanks, applied to my net-next tree: > https://github.com/stefanha/qemu/commits/net-next > > Stefan -- Vincenzo Maffione
