Changes since v3: * Using TCGType instead of bool for the ext variables. * Marginal tidying of the tcg_fmt_* functions to match fields names with the architecture document now that it's released. In particular, the ext variables incoming to them have been renamed "sf". I have not propagated that change all the way back up the call chain.
* Split up the movi improvements into 3 separate patches. I also fixed the bug therein that affected i386-softmmu booting. I've also significantly improved the documentation in that function. * I came up with a significantly faster way to actually perform the MOVN check, although I didn't confuse the issue by actually implementing it, since it requires using the neon unit, and probably real hardware to see what kind of inter-unit slow down there is. It's left as a comment. I actually suspect that the parallelism of the A57 is high enough to support performing 3 tests at once, deciding which of the 3 alternatives at once at the end. * Split up the movcond addition and setcond cleanup. I did not find a problem in either patch, as suggested during the previous review. * Rebase vs head, 2d1fe18. Tested bios boots of i386-softmmu, alpha-softmmu, sparc-softmmu. Tested a full run of Paulo's sieve{32,64}.flat. Takes around an hour to run under the Foundation model. Ouch. r~ Richard Henderson (33): tcg-aarch64: Change all ext variables to TCGType tcg-aarch64: Set ext based on TCG_OPF_64BIT tcg-aarch64: Don't handle mov/movi in tcg_out_op tcg-aarch64: Hoist common argument loads in tcg_out_op tcg-aarch64: Change enum aarch64_arith_opc to AArch64Insn tcg-aarch64: Merge enum aarch64_srr_opc with AArch64Insn tcg-aarch64: Remove the shift_imm parameter from tcg_out_cmp tcg-aarch64: Introduce tcg_fmt_Rdnm and tcg_fmt_Rdnm_lsl tcg-aarch64: Introduce tcg_fmt_Rdn_aimm tcg-aarch64: Implement mov with tcg_fmt_* functions tcg-aarch64: Handle constant operands to add, sub, and compare tcg-aarch64: Handle constant operands to and, or, xor tcg-aarch64: Support andc, orc, eqv, not tcg-aarch64: Handle zero as first argument to sub tcg-aarch64: Support movcond tcg-aarch64: Use tcg_fmt_Rdnm_cond for setcond tcg-aarch64: Support deposit tcg-aarch64: Support add2, sub2 tcg-aarch64: Support muluh, mulsh tcg-aarch64: Support div, rem tcg-aarch64: Introduce tcg_fmt_Rd_uimm tcg-aarch64: Use MOVN in tcg_out_movi tcg-aarch64: Use ORRI in tcg_out_movi tcg-aarch64: Special case small constants in tcg_out_movi tcg-aarch64: Use adrp in tcg_out_movi tcg-aarch64: Avoid add with zero in tlb load tcg-aarch64: Pass return address to load/store helpers directly. tcg-aarch64: Use tcg_out_call for qemu_ld/st tcg-aarch64: Use symbolic names for branches tcg-aarch64: Implement tcg_register_jit tcg-aarch64: Reuse FP and LR in translated code tcg-aarch64: Introduce tcg_out_ldst_pair tcg-aarch64: Remove redundant CPU_TLB_ENTRY_BITS check include/exec/exec-all.h | 11 - tcg/aarch64/tcg-target.c | 1352 ++++++++++++++++++++++++++++++---------------- tcg/aarch64/tcg-target.h | 76 +-- 3 files changed, 940 insertions(+), 499 deletions(-) -- 1.8.3.1