Implement x86_cpu_unrealizefn() for corresponding x86_cpu_realizefn(),
which is mostly used to clear the apic related information at here.
and refactor apic initialization, use QOM realizefn.
Signed-off-by: Chen Fan <chen.fan.f...@cn.fujitsu.com>
---
hw/i386/kvm/apic.c | 18 ++++++++++++++++--
hw/intc/apic.c | 18 ++++++++++++++++--
hw/intc/apic_common.c | 11 +++--------
include/hw/i386/apic_internal.h | 4 +++-
target-i386/cpu-qom.h | 1 +
target-i386/cpu.c | 35 +++++++++++++++++++++++++++++++++++
6 files changed, 74 insertions(+), 13 deletions(-)
diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index 5609063..87f1cce 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -171,21 +171,35 @@ static const MemoryRegionOps kvm_apic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void kvm_apic_init(APICCommonState *s)
+static void kvm_apic_realize(DeviceState *dev, Error **errp)
{
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *acc = APIC_COMMON_GET_CLASS(s);
+
memory_region_init_io(&s->io_memory, NULL, &kvm_apic_io_ops, s,
"kvm-apic-msi",
APIC_SPACE_SIZE);
if (kvm_has_gsi_routing()) {
msi_supported = true;
}
+
+ acc->parent_realize(dev, errp);
+}
+
+static void kvm_apic_unrealize(DeviceState *dev, Error **errp)
+{
+ APICCommonState *s = APIC_COMMON(dev);
+ memory_region_destroy(&s->io_memory);
}
static void kvm_apic_class_init(ObjectClass *klass, void *data)
{
APICCommonClass *k = APIC_COMMON_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
- k->init = kvm_apic_init;
+ k->parent_realize = dc->realize;
+ dc->realize = kvm_apic_realize;
+ dc->unrealize = kvm_apic_unrealize;
k->set_base = kvm_apic_set_base;
k->set_tpr = kvm_apic_set_tpr;
k->get_tpr = kvm_apic_get_tpr;
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index f8f2cbf..c022640 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -863,21 +863,35 @@ static const MemoryRegionOps apic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static void apic_init(APICCommonState *s)
+static void apic_realize(DeviceState *dev, Error **errp)
{
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *acc = APIC_COMMON_GET_CLASS(s);
+
memory_region_init_io(&s->io_memory, OBJECT(s), &apic_io_ops, s,
"apic-msi",
APIC_SPACE_SIZE);
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, apic_timer, s);
msi_supported = true;
+
+ acc->parent_realize(dev, errp);
+}
+
+static void apic_unrealize(DeviceState *dev, Error **errp)
+{
+ APICCommonState *s = APIC_COMMON(dev);
+ memory_region_destroy(&s->io_memory);
}
static void apic_class_init(ObjectClass *klass, void *data)
{
APICCommonClass *k = APIC_COMMON_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
- k->init = apic_init;
+ k->parent_realize = dc->realize;
+ dc->realize = apic_realize;
+ dc->unrealize = apic_unrealize;
k->set_base = apic_set_base;
k->set_tpr = apic_set_tpr;
k->get_tpr = apic_get_tpr;
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 82fbb7f..fbb276d 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -284,17 +284,15 @@ static int apic_load_old(QEMUFile *f, void *opaque, int
version_id)
return 0;
}
-static int apic_init_common(ICCDevice *dev)
+static void apic_common_realize(DeviceState *dev, Error **errp)
{
APICCommonState *s = APIC_COMMON(dev);
- APICCommonClass *info;
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
static DeviceState *vapic;
static bool mmio_registered;
s->idx = s->id;
- info = APIC_COMMON_GET_CLASS(s);
- info->init(s);
if (!mmio_registered) {
ICCBus *b = ICC_BUS(qdev_get_parent_bus(DEVICE(dev)));
memory_region_add_subregion(b->apic_address_space, 0, &s->io_memory);
@@ -310,8 +308,6 @@ static int apic_init_common(ICCDevice *dev)
if (apic_report_tpr_access && info->enable_tpr_reporting) {
info->enable_tpr_reporting(s, true);
}
-
- return 0;
}
static void apic_dispatch_pre_save(void *opaque)
@@ -377,14 +373,13 @@ static Property apic_properties_common[] = {
static void apic_common_class_init(ObjectClass *klass, void *data)
{
- ICCDeviceClass *idc = ICC_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = apic_common_realize;
dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common;
dc->no_user = 1;
dc->props = apic_properties_common;
- idc->init = apic_init_common;
}
static const TypeInfo apic_common_type = {
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 5b763ac..9f885e7 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -78,7 +78,9 @@ typedef struct APICCommonClass
{
ICCDeviceClass parent_class;
- void (*init)(APICCommonState *s);
+ DeviceRealize parent_realize;
+ DeviceUnrealize parent_unrealize;
+
void (*set_base)(APICCommonState *s, uint64_t val);
void (*set_tpr)(APICCommonState *s, uint8_t val);
uint8_t (*get_tpr)(APICCommonState *s);
diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h
index 775c82d..f36e4ff 100644
--- a/target-i386/cpu-qom.h
+++ b/target-i386/cpu-qom.h
@@ -50,6 +50,7 @@ typedef struct X86CPUClass {
/*< public >*/
DeviceRealize parent_realize;
+ DeviceUnrealize parent_unrealize;
void (*parent_reset)(CPUState *cpu);
} X86CPUClass;
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index c9d5626..9ebf3c9 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2492,10 +2492,31 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error
**errp)
return;
}
}
+
+static void x86_cpu_apic_unrealize(X86CPU *cpu, Error **errp)
+{
+ Error *local_err = NULL;
+
+ if (cpu->apic_state == NULL) {
+ return;
+ }
+
+ object_property_set_bool(OBJECT(cpu->apic_state),
+ false, "realized", &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
+ qdev_free(cpu->apic_state);
+}
#else
static void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)
{
}
+static void x86_cpu_apic_unrealize(X86CPU *cpu, Error **errp)
+{
+}
#endif
static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
@@ -2571,6 +2592,18 @@ out:
}
}
+static void x86_cpu_unrealizefn(DeviceState *dev, Error **errp)
+{
+ X86CPU *cpu = X86_CPU(dev);
+ Error *local_err = NULL;
+
+ x86_cpu_apic_unrealize(cpu, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
+}
+
/* Enables contiguous-apic-ID mode, for compatibility */
static bool compat_apic_id_mode;
@@ -2702,7 +2735,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
xcc->parent_realize = dc->realize;
+ xcc->parent_unrealize = dc->unrealize;
dc->realize = x86_cpu_realizefn;
+ dc->unrealize = x86_cpu_unrealizefn;
dc->bus_type = TYPE_ICC_BUS;
dc->props = x86_cpu_properties;
--
1.8.1.4
