Il 04/11/2013 23:26, Hervé Poussineau ha scritto:
> MIPS Jazz chipset doesn't seem to raise data bus exceptions on invalid
> accesses.
> However, there is no easy way to prevent them. Creating a big memory region
> for the whole address space doesn't prevent memory core to directly call
> unassigned_mem_read/write which in turn call cpu->do_unassigned_access,
> which (for MIPS CPU) raise an data bus exception.
Creating a big MMIO region would work, but it wouldn't let you trap
execution accesses.
> This fixes a MIPS Jazz regression introduced in
> c658b94f6e8c206c59d02aa6fbac285b86b53d2c.
>
> Signed-off-by: Hervé Poussineau <hpous...@reactos.org>
> ---
> This fixes a known regression in QEMU 1.6. Let it be fixed as soon as
> possible.
>
> hw/mips/mips_jazz.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index 49bdd02..5f6dd9f 100644
> --- a/hw/mips/mips_jazz.c
> +++ b/hw/mips/mips_jazz.c
> @@ -108,6 +108,18 @@ static void cpu_request_exit(void *opaque, int irq, int
> level)
> }
> }
>
> +static CPUUnassignedAccess real_do_unassigned_access;
> +static void mips_jazz_do_unassigned_access(CPUState *cpu, hwaddr addr,
> + bool is_write, bool is_exec,
> + int opaque, unsigned size)
> +{
> + if (!is_exec) {
> + /* ignore invalid access (ie do not raise exception) */
> + return;
> + }
> + (*real_do_unassigned_access)(cpu, addr, is_write, is_exec, opaque, size);
> +}
> +
> static void mips_jazz_init(MemoryRegion *address_space,
> MemoryRegion *address_space_io,
> ram_addr_t ram_size,
> @@ -117,6 +129,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
> char *filename;
> int bios_size, n;
> MIPSCPU *cpu;
> + CPUClass *cc;
> CPUMIPSState *env;
> qemu_irq *rc4030, *i8259;
> rc4030_dma *dmas;
> @@ -154,6 +167,17 @@ static void mips_jazz_init(MemoryRegion *address_space,
> env = &cpu->env;
> qemu_register_reset(main_cpu_reset, cpu);
>
> + /* Chipset returns 0 in invalid reads and do not raise data exceptions.
> + * However, we can't simply add a global memory region to catch
> + * everything, as memory core directly call unassigned_mem_read/write
> + * on some invalid accesses, which call do_unassigned_access on the
> + * CPU, which raise an exception.
> + * Handle that case by hijacking the do_unassigned_access method on
> + * the CPU, and do not raise exceptions for data access. */
> + cc = CPU_GET_CLASS(cpu);
> + real_do_unassigned_access = cc->do_unassigned_access;
> + cc->do_unassigned_access = mips_jazz_do_unassigned_access;
> +
> /* allocate RAM */
> memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
> vmstate_register_ram_global(ram);
>
Reviewed-by: Paolo Bonzini <pbonz...@redhat.com>
Please remember to add 1.7 in the subject at this time.
Paolo
