On 12/06/2013 10:51 AM, Peter Maydell wrote:
> + if (cond >= 0x0e) { /* condition "always" */
> + tcg_src = read_cpu_reg(s, rn, sf);
> + tcg_gen_mov_i64(tcg_rd, tcg_src);
I wonder if it's worth adding that 0x0[ef] case to the generic condition
processing rather than keep replicating it everywhere.
> + } else {
> + /* OPTME: we could use movcond here, at the cost of duplicating
> + * a lot of the arm_gen_test_cc() logic.
> + */
Honestly, arm_gen_test_cc should get refactored to a real test (as opposed to
branch) sooner rather than later.
Longer term it's probably worth recognizing the special case of Rm==31 &&
Rn==31 && else_inc as setcond as opposed to movcond.
> + arm_gen_test_cc(cond, label_match);
> + /* nomatch: */
> + tcg_src = read_cpu_reg(s, rm, sf);
> + tcg_gen_mov_i64(tcg_rd, tcg_src);
> + if (else_inv) {
> + tcg_gen_not_i64(tcg_rd, tcg_rd);
> + }
> + if (else_inc) {
> + tcg_gen_addi_i64(tcg_rd, tcg_rd, 1);
> + }
I think better as
if (else_inv && else_inc) {
tcg_gen_neg_i64(tcg_rd, tcg_src);
} else if (else_inv) {
tcg_gen_not_i64(tcg_rd, tcg_src);
} else if (else_inc) {
tcg_gen_addi_i64(tcg_rd, tcg_src, 1);
} else {
tcg_gen_mov_i64(tcg_rd, tcg_src);
}
> + if (!sf) {
> + tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
> + }
I do wonder about the usefulness of passing SF (as opposed to hardcoding 1) to
read_cpu_reg to begin, since the ext32u that it generates is redundant with the
one here at the end, and likely cannot be optimized away.
r~
