From: Liu Jinsong <jinsong....@intel.com> Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
However, before this patch the CPUID worked fine -- the .offset field contained the size _and_ was stored in the register that is supposed to hold the size (eax), and likewise the .size field contained the offset _and_ was stored in the register trhat is supposed to hold the offset (ebx). Signed-off-by: Liu Jinsong <jinsong....@intel.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- target-i386/cpu.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 47af9a8..bb98f6d 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -335,7 +335,7 @@ typedef struct ExtSaveArea { static const ExtSaveArea ext_save_areas[] = { [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX, - .offset = 0x100, .size = 0x240 }, + .offset = 0x240, .size = 0x100 }, }; const char *get_register_name_32(unsigned int reg) @@ -2227,8 +2227,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, const ExtSaveArea *esa = &ext_save_areas[count]; if ((env->features[esa->feature] & esa->bits) == esa->bits && (kvm_mask & (1 << count)) != 0) { - *eax = esa->offset; - *ebx = esa->size; + *eax = esa->size; + *ebx = esa->offset; } } break; -- 1.7.1