Contains two patch sets, recently reviewed. Plus two other
unrelated patches that probably weren't going to get in via
any other tree.
r~
The following changes since commit 0dbcf95a1ea5a5ca6222765ff8813c2cc17e8abd:
libvixl: fix 64bit constants usage (2014-02-15 20:26:30 +0000)
are available in the git repository at:
git://github.com/rth7680/qemu.git tcg-next
for you to fetch changes up to 6399ab3325b7d4f77441c8a00fa9dae98bb0ac43:
tcg/i386: Use SHLX/SHRX/SARX instructions (2014-02-17 10:12:29 -0600)
----------------------------------------------------------------
Aurelien Jarno (4):
tcg/optimize: fix known-zero bits for right shift ops
tcg/optimize: fix known-zero bits optimization
tcg/optimize: improve known-zero bits for 32-bit ops
tcg/optimize: add known-zero bits compute for load ops
Huw Davies (1):
tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1].
Richard Henderson (10):
TCG: Fix 32-bit host allocation typo
tcg/optimize: Handle known-zeros masks for ANDC
tcg/optimize: Simply some logical ops to NOT
tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0
tcg/optimize: Add more identity simplifications
disas/i386: Disassemble ANDN/SHLX/SHRX/SHAX
tcg/i386: Move TCG_CT_CONST_* to tcg-target.c
tcg/i386: Add tcg_out_vex_modrm
tcg/i386: Use ANDN instruction
tcg/i386: Use SHLX/SHRX/SARX instructions
disas/i386.c | 146 +++++++++++++++++++++++++++++++++++++++-----
tcg/arm/tcg-target.c | 2 +-
tcg/i386/tcg-target.c | 156 +++++++++++++++++++++++++++++++++++++++--------
tcg/i386/tcg-target.h | 9 ++-
tcg/optimize.c | 165 +++++++++++++++++++++++++++++++++++++++++++-------
tcg/tcg.c | 2 +-
6 files changed, 414 insertions(+), 66 deletions(-)
