This replaces VRSAVE registration and vscr_init() call with gen_spr_book3s_altivec() which is generic and does the same thing if insns_flags has PPC_ALTIVEC bit set (which POWER7/8 have set).
Signed-off-by: Alexey Kardashevskiy <a...@ozlabs.ru> --- Here is the function for the reference: static void gen_spr_book3s_altivec(CPUPPCState *env) { if (!(env->insns_flags & PPC_ALTIVEC)) { return; } spr_register(env, SPR_VRSAVE, "SPR_VRSAVE", &spr_read_generic, &spr_write_generic, &spr_read_generic, &spr_write_generic, 0x00000000); /* Can't find information on what this should be on reset. This * value is the one used by 74xx processors. */ vscr_init(env, 0x00010000); } --- target-ppc/translate_init.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 576056c..40c8ce1 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7778,6 +7778,7 @@ static void init_proc_POWER7 (CPUPPCState *env) { gen_spr_ne_601(env); gen_spr_7xx(env); + gen_spr_book3s_altivec(env); /* Time base */ gen_tbl(env); #if !defined(CONFIG_USER_ONLY) @@ -7801,10 +7802,6 @@ static void init_proc_POWER7 (CPUPPCState *env) gen_spr_power6_common(env); gen_spr_power6_dbg(env); gen_spr_amr(env); - spr_register(env, SPR_VRSAVE, "SPR_VRSAVE", - &spr_read_generic, &spr_write_generic, - &spr_read_generic, &spr_write_generic, - 0x00000000); /* Logical partitionning */ spr_register_kvm(env, SPR_LPCR, "LPCR", SPR_NOACCESS, SPR_NOACCESS, @@ -7819,9 +7816,6 @@ static void init_proc_POWER7 (CPUPPCState *env) /* Allocate hardware IRQ controller */ ppcPOWER7_irq_init(env); - /* Can't find information on what this should be on reset. This - * value is the one used by 74xx processors. */ - vscr_init(env, 0x00010000); } POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) -- 2.0.0