On 19 August 2014 11:25, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 19 August 2014 10:56, Edgar E. Iglesias <edgar.igles...@gmail.com> wrote: >> On Fri, Aug 08, 2014 at 01:18:12PM +0100, Peter Maydell wrote: >>> --- a/target-arm/cpu.h >>> +++ b/target-arm/cpu.h >>> @@ -1211,6 +1211,10 @@ static inline bool arm_singlestep_active(CPUARMState >>> *env) >>> #define ARM_TBFLAG_AA64_EL_MASK (0x3 << ARM_TBFLAG_AA64_EL_SHIFT) >>> #define ARM_TBFLAG_AA64_FPEN_SHIFT 2 >>> #define ARM_TBFLAG_AA64_FPEN_MASK (1 << ARM_TBFLAG_AA64_FPEN_SHIFT) >>> +#define ARM_TBFLAG_AA64_SS_ACTIVE_SHIFT 3 >>> +#define ARM_TBFLAG_AA64_SS_ACTIVE_MASK (1 << >>> ARM_TBFLAG_AA64_SS_ACTIVE_SHIFT) >>> +#define ARM_TBFLAG_AA64_PSTATE_SS_SHIFT 3 >>> +#define ARM_TBFLAG_AA64_PSTATE_SS_MASK (1 << >>> ARM_TBFLAG_AA64_PSTATE_SS_SHIFT) >> >> Shouldn't these shifts/masks differ? > > Oops. Yes, they certainly should.
The fix is just a simple s/3/4/ for the PSTATE_SS_SHIFT define. Does anybody want a retransmit of the series for this one-liner? thanks -- PMM
