Hi,
> Subject: [PATCH 3/3] ioh3420: Support ARI forwarding
>
>
> Enable the PCIe capability bit that indicates that this port is able to
> support
> and forward requests to > 8 functions for ARI capable devices.
>
> Signed-off-by: Knut Omang <knut.om...@oracle.com>
> ---
> hw/pci-bridge/ioh3420.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
I think you should associate patch 2/3 with patch 3/3 to
one patch, otherwise after patch 2/3 building are broken.
Best regards,
-Gonglei
> diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c
> index 8f6c8b0..c14ea6b 100644
> --- a/hw/pci-bridge/ioh3420.c
> +++ b/hw/pci-bridge/ioh3420.c
> @@ -92,8 +92,10 @@ static void ioh3420_reset(DeviceState *qdev)
>
> static int ioh3420_initfn(PCIDevice *d)
> {
> + PCIBridge* br = PCI_BRIDGE(d);
> PCIEPort *p = PCIE_PORT(d);
> PCIESlot *s = PCIE_SLOT(d);
> + uint8_t *exp_cap;
> int rc;
> char tmp[100];
> sprintf(tmp, "pcie_port.%d", s->slot);
> @@ -121,6 +123,10 @@ static int ioh3420_initfn(PCIDevice *d)
> if (rc < 0) {
> goto err_msi;
> }
> + /* Support ARI forwarding */
> + exp_cap = d->config + d->exp.exp_cap;
> + pci_word_test_and_set_mask(exp_cap + PCI_EXP_DEVCAP2,
> PCI_EXP_DEVCAP2_ARI);
> +
> pcie_cap_deverr_init(d);
> pcie_cap_slot_init(d, s->slot);
> pcie_chassis_create(s->chassis);
> @@ -151,6 +157,7 @@ err_bridge:
> static void ioh3420_exitfn(PCIDevice *d)
> {
> PCIESlot *s = PCIE_SLOT(d);
> + PCIBridge* br = PCI_BRIDGE(d);
>
> pcie_aer_exit(d);
> pcie_chassis_del_slot(s);
> --
> 1.9.0
>
