From: David Hildenbrand <d...@linux.vnet.ibm.com> We need to synchronize registers after a reset has been performed. The current code does that in qemu_system_reset(), load_normal_reset() and modified_clear_reset() for all vcpus. After SIGP (INITIAL) CPU RESET, this needs to be done for the targeted vcpu as well, so let's call cpu_synchronize_post_reset() in the respective handlers.
Signed-off-by: David Hildenbrand <d...@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jf...@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.h...@de.ibm.com> CC: Andreas Faerber <afaer...@suse.de> Tested-by: Christian Borntraeger <borntrae...@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.h...@de.ibm.com> --- target-s390x/kvm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c index e4c4c8d..5b10a25 100644 --- a/target-s390x/kvm.c +++ b/target-s390x/kvm.c @@ -952,6 +952,7 @@ static void sigp_initial_cpu_reset(void *arg) cpu_synchronize_state(cpu); scc->initial_cpu_reset(cpu); + cpu_synchronize_post_reset(cpu); } static void sigp_cpu_reset(void *arg) @@ -961,6 +962,7 @@ static void sigp_cpu_reset(void *arg) cpu_synchronize_state(cpu); scc->cpu_reset(cpu); + cpu_synchronize_post_reset(cpu); } #define SIGP_ORDER_MASK 0x000000ff -- 1.7.9.5