On 17.11.14 21:58, Tom Musta wrote: > The Load Vector Element Indexed and Store Vector Element Indexed > instructions compute an effective address in the usual manner. > However, they truncate that address to the natural boundary. > For example, the lvewx instruction will ignore the least significant > two bits of the address and thus load the aligned word of storage. > > Fix the generators for these instruction to properly perform this > truncation. > > Signed-off-by: Tom Musta <tommu...@gmail.com>
Thanks, applied to ppc-next-2.3 Alex
