On 02/24/2015 05:39 AM, Chen Gang S wrote: > After read through target-arm/translate-a64.c, I guess, the main reason > is: the zero register (r31) shares with the sp register (also r31). > > - So it uses cpu_reg() and cpu_reg_sp() for them. > > - For each zero register access, it will new a tcg temporary variable > for it, and release it after finish decoding one insn (so it will not > overwrite sp register.). > > For tilegx, zero register (r63) does not share with other registers (sp > is r54), so we needn't use wrap functions for it.
Perhaps aarch64 is confusing for you. But Alpha also has zero registers, and also uses wrapper functions. See load_gpr and dest_gpr. The very most important reason to use a wrapper, and thus a tcg temporary that keeps getting re-initialized to zero, is that the tcg optimizer gets to see that zero and optimize the code accordingly. r~
