The FIS Receive Buffer and Command List Buffer pointers should not be edited while the FIS receive engine or Command Receive engines are running.
Currently, we attempt to re-map the buffers every time they are adjusted, but while the AHCI engines are off, these registers may contain stale values, so we should not attempt to re-map these values until the engines are reactivated. Reported-by: Jordan Hargrave <[email protected]> Signed-off-by: John Snow <[email protected]> --- hw/ide/ahci.c | 35 +++++++++++++++++++++-------------- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 5651372..42bbf7f 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -51,6 +51,8 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis); static void ahci_init_d2h(AHCIDevice *ad); static int ahci_dma_prepare_buf(IDEDMA *dma, int is_write); static void ahci_commit_buf(IDEDMA *dma, uint32_t tx_bytes); +static void ahci_map_clb_address(AHCIDevice *ad); +static void ahci_map_fis_address(AHCIDevice *ad); static uint32_t ahci_port_read(AHCIState *s, int port, int offset) @@ -202,25 +204,15 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val) switch (offset) { case PORT_LST_ADDR: pr->lst_addr = val; - map_page(s->as, &s->dev[port].lst, - ((uint64_t)pr->lst_addr_hi << 32) | pr->lst_addr, 1024); - s->dev[port].cur_cmd = NULL; break; case PORT_LST_ADDR_HI: pr->lst_addr_hi = val; - map_page(s->as, &s->dev[port].lst, - ((uint64_t)pr->lst_addr_hi << 32) | pr->lst_addr, 1024); - s->dev[port].cur_cmd = NULL; break; case PORT_FIS_ADDR: pr->fis_addr = val; - map_page(s->as, &s->dev[port].res_fis, - ((uint64_t)pr->fis_addr_hi << 32) | pr->fis_addr, 256); break; case PORT_FIS_ADDR_HI: pr->fis_addr_hi = val; - map_page(s->as, &s->dev[port].res_fis, - ((uint64_t)pr->fis_addr_hi << 32) | pr->fis_addr, 256); break; case PORT_IRQ_STAT: pr->irq_stat &= ~val; @@ -235,10 +227,12 @@ static void ahci_port_write(AHCIState *s, int port, int offset, uint32_t val) if (pr->cmd & PORT_CMD_START) { pr->cmd |= PORT_CMD_LIST_ON; + ahci_map_clb_address(&s->dev[port]); } if (pr->cmd & PORT_CMD_FIS_RX) { pr->cmd |= PORT_CMD_FIS_ON; + ahci_map_fis_address(&s->dev[port]); } /* XXX usually the FIS would be pending on the bus here and @@ -565,6 +559,21 @@ static void debug_print_fis(uint8_t *fis, int cmd_len) #endif } +static void ahci_map_fis_address(AHCIDevice *ad) +{ + AHCIPortRegs *pr = &ad->port_regs; + map_page(ad->hba->as, &ad->res_fis, + ((uint64_t)pr->fis_addr_hi << 32) | pr->fis_addr, 256); +} + +static void ahci_map_clb_address(AHCIDevice *ad) +{ + AHCIPortRegs *pr = &ad->port_regs; + ad->cur_cmd = NULL; + map_page(ad->hba->as, &ad->lst, + ((uint64_t)pr->lst_addr_hi << 32) | pr->lst_addr, 1024); +} + static void ahci_write_fis_sdb(AHCIState *s, int port, uint32_t finished) { AHCIDevice *ad = &s->dev[port]; @@ -1366,10 +1375,8 @@ static int ahci_state_post_load(void *opaque, int version_id) ad = &s->dev[i]; AHCIPortRegs *pr = &ad->port_regs; - map_page(s->as, &ad->lst, - ((uint64_t)pr->lst_addr_hi << 32) | pr->lst_addr, 1024); - map_page(s->as, &ad->res_fis, - ((uint64_t)pr->fis_addr_hi << 32) | pr->fis_addr, 256); + ahci_map_clb_address(ad); + ahci_map_fis_address(ad); /* * All pending i/o should be flushed out on a migrate. However, * we might not have cleared the busy_slot since this is done -- 1.9.3
