On 15 May 2015 at 03:22, Peter Crosthwaite <peter.crosthwa...@xilinx.com> wrote: > Hi Peter and all, > > Xilinx's next gen SoC has been announced. This series adds a SoC and > board. > > Series start with addition of ARM cortex A53 support (P1 and P2). The > Soc skeleton is then added with GIC, EMACs and UARTs added. The > pre-existing models for GEM and UART are not SoC friendly (no visible > state struct), so those are refactored for SoC. > > Create a model of the EP108 board. Currently this doesn't have any > EP108 specific features but is a usable board exposing the user visible > features of the raw SoC. > > See individual patches for detailed change logs. >
Applied to target-arm.next, thanks. -- PMM
