On Friday, May 22, 2015, Pavel Fedin <p.fe...@samsung.com> wrote: > Hello! > > > The GIC-500 provides registers for managing interrupt sources, interrupt > behavior, and interrupt > > routing to one or more cores. It supports: > > • Multiprocessor environments with up to 128 cores. > > • Up to 32 affinity-level 1 clusters. > > • Up to eight cores for each cluster. > > > I guess your hardware uses different GIC. > > Heh, yes, looks like that. And perhaps it's somewhat non-standard... > I will study kvmtool and try to come up with some good solution. > > By the way, since you're referring to documentation... TRM you have > mentioned contains references to "GIC architecture reference manual v3.0", > which i was unable to find. On ARM resource center i see only v2 of the > manual. And it looks like you have it because otherwise you would not get > description of many registers. Can you point me at a correct place ? > > Kind regards, > Pavel Fedin > Expert Engineer > Samsung Electronics Research center Russia > > > Hi Pavel,
We have a copy at work which I came from ARM, I'm sure that since Samsung manufactures ARM SoC under licence you can put your hand on one. I can also add that most of my work was done using the GIC-500 document and by looking for what the Linux (kernel) is doing. Only recently I was able to put my hand on the GICv3, but It only confirmed what I already assumed. Best regards, S.P.
