On Mon, May 18, 2015 at 4:14 PM, Alistair Francis
<alistair.fran...@xilinx.com> wrote:
> Rename the "xlnx.base-vectors" string to "base-vectors" and
> move the base_vectors variable into the cfg struct.
>
> Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
> ---
>
> target-microblaze/cpu-qom.h | 3 ++-
> target-microblaze/cpu.c | 4 ++--
> target-microblaze/helper.c | 8 ++++----
> 3 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h
> index 7bc5b81..750ff3b 100644
> --- a/target-microblaze/cpu-qom.h
> +++ b/target-microblaze/cpu-qom.h
> @@ -56,12 +56,13 @@ typedef struct MicroBlazeCPUClass {
> typedef struct MicroBlazeCPU {
> /*< private >*/
> CPUState parent_obj;
> - uint32_t base_vectors;
> +
> /*< public >*/
>
> /* Microblaze Configuration Settings */
> struct {
> bool stackproc;
> + uint32_t base_vectors;
> } cfg;
>
> CPUMBState env;
> diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
> index 4deb256..c7ad5d5 100644
> --- a/target-microblaze/cpu.c
> +++ b/target-microblaze/cpu.c
> @@ -123,7 +123,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error
> **errp)
> env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
> env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
>
> - env->sregs[SR_PC] = cpu->base_vectors;
> + env->sregs[SR_PC] = cpu->cfg.base_vectors;
>
> #if defined(CONFIG_USER_ONLY)
> env->pvr.regs[10] = 0x0c000000; /* Spartan 3a dsp. */
> @@ -161,7 +161,7 @@ static const VMStateDescription vmstate_mb_cpu = {
> };
>
> static Property mb_properties[] = {
> - DEFINE_PROP_UINT32("xlnx.base-vectors", MicroBlazeCPU, base_vectors, 0),
> + DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0),
> DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackproc,
> true),
> DEFINE_PROP_END_OF_LIST(),
> diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
> index 32896f4..69c3252 100644
> --- a/target-microblaze/helper.c
> +++ b/target-microblaze/helper.c
> @@ -154,7 +154,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
> env->sregs[SR_ESR], env->iflags);
> log_cpu_state_mask(CPU_LOG_INT, cs, 0);
> env->iflags &= ~(IMM_FLAG | D_FLAG);
> - env->sregs[SR_PC] = cpu->base_vectors + 0x20;
> + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x20;
> break;
>
> case EXCP_MMU:
> @@ -194,7 +194,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
> env->sregs[SR_PC], env->sregs[SR_EAR],
> env->iflags);
> log_cpu_state_mask(CPU_LOG_INT, cs, 0);
> env->iflags &= ~(IMM_FLAG | D_FLAG);
> - env->sregs[SR_PC] = cpu->base_vectors + 0x20;
> + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x20;
> break;
>
> case EXCP_IRQ:
> @@ -235,7 +235,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
> env->sregs[SR_MSR] |= t;
>
> env->regs[14] = env->sregs[SR_PC];
> - env->sregs[SR_PC] = cpu->base_vectors + 0x10;
> + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x10;
> //log_cpu_state_mask(CPU_LOG_INT, cs, 0);
> break;
>
> @@ -254,7 +254,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
> if (cs->exception_index == EXCP_HW_BREAK) {
> env->regs[16] = env->sregs[SR_PC];
> env->sregs[SR_MSR] |= MSR_BIP;
> - env->sregs[SR_PC] = cpu->base_vectors + 0x18;
> + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x18;
> } else
> env->sregs[SR_PC] = env->btarget;
> break;
> --
> 1.7.1
>
>
