On Thu, May 28, 2015 at 02:19:42PM +0100, Peter Maydell wrote:
> On 28 May 2015 at 13:50, Edgar E. Iglesias <edgar.igles...@xilinx.com> wrote:
> > On Tue, May 19, 2015 at 07:33:31PM +0100, Peter Maydell wrote:
> >> + /* For the CPTR registers we don't need to guard with an ARM_FEATURE
> >> + * check because zero bits in the registers mean "don't trap".
> >> + */
> >> +
> >> + /* CPTR_EL2 : present in v7VE or v8 */
> >> + if (cur_el <= 2 && extract32(env->cp15.cptr_el[2], 10, 1)
> >> + && arm_is_secure_below_el3(env)) {
> >
> > I think this should be !arm_is_secure_below_el3(env)
>
> Yes.
>
> > Also the ARMv7 manual, the part describing CPACR cpn bits, indicates that
> > HCTPR has prio over CPACR. I didn't find any thing like that for
> > ARMv8... There might be a difference between v8/v7 here, do you know?
>
> For v8, this is described in "G1.11.2 Exception priority order" I think:
> exceptions taken to EL1 because of configurable access to insns
> are item 8, which has higher priority than HCPTR traps (item 10).
> This matches the code I have in this patch.
>
> I believe that v7 is the same, and the v7 ARM ARM is just slightly
> confusingly worded. The HCPTR documentation says that setting TCPn
> to 1 traps "any otherwise-valid Non-secure access to CPn". The
> CheckAdvSIMDOrVFPEnabled() pseudocode also clearly checks CPACR
> first and HCPTR second.
Thanks for clarifying that. With the !arm_is_secure_below_el3(env)
change:
Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Cheers,
Edgar
