Thanks again. One more question. On versions prior to the mentioned commit, is there any specific reason (in x86 source code of QEMU) to choose separate modes for address translations (of kernel and user mode)? Or was that done just for performance improvement?
On Wed, Jun 3, 2015 at 3:58 PM, Paolo Bonzini <pbonz...@redhat.com> wrote: > > > On 03/06/2015 09:41, Sandhya Kumar wrote: > > Thanks for your mail. Are these TLB modes logic specific to QEMU > > implementation for x86? > > Yes, they are specific to QEMU. > > > Asking this as I am not able to get any information about seperate TLBs > > from Intel developer manuals > > Real hardware TLBs probably work in a completely different (and > undocumented) way. > > Paolo >
