On 08/09/2015 01:13 PM, Laurent Vivier wrote: > +DISAS_INSN(scc_mem) > +{ > + TCGLabel *l1; > + int cond; > + TCGv dest; > + > + l1 = gen_new_label(); > + cond = (insn >> 8) & 0xf; > + dest = tcg_temp_local_new(); > + tcg_gen_movi_i32(dest, 0); > + gen_jmpcc(s, cond ^ 1, l1); > + tcg_gen_movi_i32(dest, 0xff); > + gen_set_label(l1); > + DEST_EA(env, insn, OS_BYTE, dest, NULL); > + tcg_temp_free(dest); > +}
It seems like this could just as easily be shared with scc? DEST_EA handles a byte store into a register just fine. I suppose the real ugliness at the moment is the tcg branch; if you were using setcond instead that would help matters. Adjusting the code surrounding gen_jmpcc is a larger task, but it really would help a lot. There are several examples of how to organize such a thing... > +DISAS_INSN(dbcc) > +{ > + TCGLabel *l1; > + TCGv reg; > + TCGv tmp; > + int16_t offset; > + uint32_t base; > + > + reg = DREG(insn, 0); > + base = s->pc; > + offset = cpu_ldsw_code(env, s->pc); > + s->pc += 2; read_im16? > + l1 = gen_new_label(); > + gen_jmpcc(s, (insn >> 8) & 0xf, l1); > + > + tmp = tcg_temp_new(); > + tcg_gen_ext16s_i32(tmp, reg); > + tcg_gen_addi_i32(tmp, tmp, -1); > + gen_partset_reg(OS_WORD, reg, tmp); > + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, -1, l1); > + update_cc_op(s); > + gen_jmp_tb(s, 1, base + offset); > + gen_set_label(l1); > + update_cc_op(s); Move the update_cc_op calls before the first branch. r~