Hi Frederic, On Wed, Aug 26, 2015 at 2:18 PM, Frederic Konrad <fred.kon...@greensocs.com> wrote: > Hi everybody, > > I'm trying to do the next version of the MTTCG work: > > I would like to rebase on Alvise atomic instruction branch: > - Alvise can you rebase it on the 2.4.0 version without MTTCG support and > then > point me to the MTTCG specific changes so I can include them in my tree?
Yes, I will do it. Regarding the changes, it will not be that difficult to port the whole thing to MTTCG. Basically, something along the lines of "Atomic slow-path for mttcg v4" has to be done. In any case, let's discuss it during the telco. Regards, alvise > I will add Paolo's linux-user and signal free qemu_cpu_kick series as well. > > About tb_flush we think to do that without exiting: > - Use two buffers for tbs. > - Use a per tb invalidated flag. > - when tb_flush just invalidate all tb from the buffer and swap to the > second buffer: > VCPU which are executing code will discard their tb_jmp_cache when they > exit > (eg: run_on_cpu). > > We need also to fix emulated data barrier so tlb_flush are finished before > the > instruction is executed. (That might be only data barrier breaks the TB). > > Protecting page->code_bitmap and cpu_breakpoint_insert changes will be > squashed in the tb_lock patch. > > More tests must be done especially with gdbstub and icount. > > Do that make sense? > Fred