On 07/04/16 19:01, Paolo Bonzini wrote:
>
> On 07/04/2016 17:53, Sergey Fedorov wrote:
>> Ensure direct jump patching in MIPS is atomic by using
>> atomic_read()/atomic_set() for code patching.
>>
>> Signed-off-by: Sergey Fedorov <serge.f...@gmail.com>
>> Signed-off-by: Sergey Fedorov <sergey.fedo...@linaro.org>
>> ---
>> tcg/mips/tcg-target.inc.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
>> index 682e19897db0..e65835d2096b 100644
>> --- a/tcg/mips/tcg-target.inc.c
>> +++ b/tcg/mips/tcg-target.inc.c
>> @@ -1886,6 +1886,7 @@ static void tcg_target_init(TCGContext *s)
>> void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
>> {
>> uint32_t *ptr = (uint32_t *)jmp_addr;
>> - *ptr = deposit32(*ptr, 0, 26, addr >> 2);
>> + uint32_t insn = atomic_read(ptr);
>> + atomic_write(ptr, deposit32(insn, 0, 26, addr >> 2));
> Oops. :)
>
> Paolo
Nice catch! I think I just didn't cross-compile it for MIPS...
Thanks,
Sergey
>
>> flush_icache_range(jmp_addr, jmp_addr + 4);
>> }
