From: Vijaya Kumar K <vija...@cavium.com> For AARCH64, minimum page size is 4K, for ARM32 bit platforms minimum page size is 1K. With this patch series, the page size is calculated at run-time based on cpu model emulated.
Having higher/optimal page size, improves emulation and migration performance. Vijaya Kumar K (4): migration: Remove static allocation of xzblre cache buffer exec.c: Remove static allocation of sub_section of sub_page translate-all.c: Compute L1 page table properties at runtime target-arm: Compute page size based on ARM target cpu type exec.c | 5 +++-- hw/arm/virt.c | 48 +++++++++++++++++++++++++++++++++++++++++ include/hw/boards.h | 1 + include/qemu-common.h | 1 + migration/ram.c | 4 +++- target-arm/cpu.h | 12 ++++++----- translate-all.c | 57 ++++++++++++++++++++++++++++++------------------- vl.c | 10 +++++++++ 8 files changed, 108 insertions(+), 30 deletions(-) -- 1.7.9.5
