On Fri, Jun 10, 2016 at 4:52 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 12 May 2016 at 23:46, Alistair Francis <alistair.fran...@xilinx.com> wrote: >> Add GPIO functionality to the register API. This allows association >> and automatic connection of GPIOs to bits in registers. GPIO inputs >> will attach to handlers that automatically set read-only bits in >> registers. GPIO outputs will be updated to reflect their field value >> when their respective registers are written (or reset). Supports >> active low GPIOs. >> >> This is particularly effective for implementing system level >> controllers, where heterogenous collections of control signals are >> placed is a SoC specific peripheral then propagated all over the >> system. >> >> Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> >> [ EI Changes: >> * register: Add a polarity field to GPIO connections >> Makes it possible to directly connect active low signals >> to generic interrupt pins. >> ] >> Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> >> Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com> > > I'm definitely not convinced of the utility of this. I think > almost all devices don't have registers with bits which map > 1:1 to GPIO lines like this, and the few devices which do can > easily enough just implement them by hand. GPIOs are (in my > view) a device level concept, not a register level concept, > and I think they're better implemented at the device level.
I disagree, I think there are a lot of times where they are useful, especially as SoCs become more complex and interlinked. This device is a good example: https://github.com/Xilinx/qemu/commit/880f24ab6ee2f869d199c0d2aecc92c1fbd8b8cb They are also an optional feature, if someone wants to do it the current way that is still supported (and sometimes still required). Thanks, Alistair > > thanks > -- PMM >