On Mon, 2016-06-27 at 14:47 +0100, Peter Maydell wrote: > On 24 June 2016 at 05:58, Andrew Jeffery <and...@aj.id.au> wrote: > > > > Hi all, > > > > These are three patches implementing minimal functionality for the ASPEED > > System > > Control Unit device and integrating it into the AST2400 SoC > > model/palmetto-bmc > > machine. The device is critical for initialisation of u-boot and the kernel > > as > > it provides chip level control registers, influencing the configuration of > > the > > software and the software's configuration of the SoC. > > > > Since v2: > > > > * Fix mixing of offsets and register indexes > > * Sanity check device property values > > * SoC actually initialises the silicon revision > > > > Since v1: > > > > * Select reset values based on silicon revision > > * Expose hardware strapping values via properties > > > > Andrew Jeffery (3): > > hw/misc: Add a model for the ASPEED System Control Unit > > ast2400: Integrate the SCU model and set silicon revision > > palmetto-bmc: Configure the SCU's hardware strapping register > > > Applied to target-arm.next, thanks.
Thanks; I intend to send a follow-up patch addressing the discussion on patch 3/3. I'm away for a week so it will miss soft-freeze, but given the nature of the patch that might not be the end of the world? Cheers, Andrew
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