On Sat, 2016-07-09 at 12:52 +1000, Benjamin Herrenschmidt wrote: > > Additionally, hreg_compute_mem_idx() will treat PR=1 as DR=1/IR=1 > as well ! That means that if those old processors allow PR=1 and IR > or DR=0 and MacOS uses it, we do have a TLB coherency problem in > qemu.
Wow, yes indeed, I see an MSR with PR=1 IR=0, IR=1 and EE=0 .. ugh. Cheers, Ben.
