Sergey Fedorov <sergey.fedo...@linaro.org> writes:
> From: Sergey Fedorov <serge.f...@gmail.com>
>
> 'HF_SOFTMMU_MASK' is only set when 'CONFIG_SOFTMMU' is defined. So
> there's no need in this flag: test 'CONFIG_SOFTMMU' instead.
>
> Suggested-by: Paolo Bonzini <pbonz...@redhat.com>
> Signed-off-by: Sergey Fedorov <serge.f...@gmail.com>
> Signed-off-by: Sergey Fedorov <sergey.fedo...@linaro.org>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
> ---
> target-i386/cpu.c | 3 ---
> target-i386/cpu.h | 3 ---
> target-i386/translate.c | 12 ++++--------
> 3 files changed, 4 insertions(+), 14 deletions(-)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index fc209ee1cb8a..6e49e4ca8282 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2725,9 +2725,6 @@ static void x86_cpu_reset(CPUState *s)
>
> /* init to reset state */
>
> -#ifdef CONFIG_SOFTMMU
> - env->hflags |= HF_SOFTMMU_MASK;
> -#endif
> env->hflags2 |= HF2_GIF_MASK;
>
> cpu_x86_update_cr0(env, 0x60000010);
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index 5c7a2791f34f..a7c752afdad8 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -129,8 +129,6 @@
> positions to ease oring with eflags. */
> /* current cpl */
> #define HF_CPL_SHIFT 0
> -/* true if soft mmu is being used */
> -#define HF_SOFTMMU_SHIFT 2
> /* true if hardware interrupts must be disabled for next instruction */
> #define HF_INHIBIT_IRQ_SHIFT 3
> /* 16 or 32 segments */
> @@ -160,7 +158,6 @@
> #define HF_MPX_IU_SHIFT 26 /* BND registers in-use */
>
> #define HF_CPL_MASK (3 << HF_CPL_SHIFT)
> -#define HF_SOFTMMU_MASK (1 << HF_SOFTMMU_SHIFT)
> #define HF_INHIBIT_IRQ_MASK (1 << HF_INHIBIT_IRQ_SHIFT)
> #define HF_CS32_MASK (1 << HF_CS32_SHIFT)
> #define HF_SS32_MASK (1 << HF_SS32_SHIFT)
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index 7dea18bd6345..e81fce7bc2b5 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -8224,9 +8224,9 @@ void gen_intermediate_code(CPUX86State *env,
> TranslationBlock *tb)
> dc->popl_esp_hack = 0;
> /* select memory access functions */
> dc->mem_index = 0;
> - if (flags & HF_SOFTMMU_MASK) {
> - dc->mem_index = cpu_mmu_index(env, false);
> - }
> +#ifdef CONFIG_SOFTMMU
> + dc->mem_index = cpu_mmu_index(env, false);
> +#endif
> dc->cpuid_features = env->features[FEAT_1_EDX];
> dc->cpuid_ext_features = env->features[FEAT_1_ECX];
> dc->cpuid_ext2_features = env->features[FEAT_8000_0001_EDX];
> @@ -8239,11 +8239,7 @@ void gen_intermediate_code(CPUX86State *env,
> TranslationBlock *tb)
> #endif
> dc->flags = flags;
> dc->jmp_opt = !(dc->tf || cs->singlestep_enabled ||
> - (flags & HF_INHIBIT_IRQ_MASK)
> -#ifndef CONFIG_SOFTMMU
> - || (flags & HF_SOFTMMU_MASK)
> -#endif
> - );
> + (flags & HF_INHIBIT_IRQ_MASK));
> /* Do not optimize repz jumps at all in icount mode, because
> rep movsS instructions are execured with different paths
> in !repz_opt and repz_opt modes. The first one was used
--
Alex Bennée
