From: Sergey Fedorov <serge.f...@gmail.com> Hi,
This is a respin of this series [1]. Here I used a modified version of Paolo's patch to docuement memory ordering assumptions for certain QHT operations. The last patch is a suggestion for renaming tb_find_physicall(). This series can be fetch from the public git repository: https://github.com/sergefdrv/qemu.git lockless-tb-lookup-v4 [1] http://thread.gmane.org/gmane.comp.emulators.qemu/426341 Kind regards, Sergey Summary of changes in v4: - Modified version of Paolo's patch is used to document memory ordering assumptions for certain QHT operations - Intermediate compilation errors fixed - Atomic access to TB CPU state - tb_find_physical() renamed Summary of changes in v3: - QHT memory ordering assumptions documented - 'tb_jmp_cache' reset in tb_flush() made atomic - explicit memory barriers removed around 'tb_jmp_cache' access - safe access to 'tb_flushed' out of 'tb_lock' prepared - TBs marked with invalid CPU state early on invalidation - Alex's tb_find_{fast,slow}() roll-up related patches dropped - bouncing of tb_lock between tb_gen_code() and tb_add_jump() avoided with local variable 'have_tb_lock' - tb_find_{fast,slow}() merged Alex Bennée (2): tcg: set up tb->page_addr before insertion tcg: cpu-exec: remove tb_lock from the hot-path Paolo Bonzini (1): util/qht: Document memory ordering assumptions Sergey Fedorov (9): tcg: Pass last_tb by value to tb_find_fast() tcg: Prepare safe tb_jmp_cache lookup out of tb_lock tcg: Prepare safe access to tb_flushed out of tb_lock target-i386: Remove redundant HF_SOFTMMU_MASK tcg: Introduce tb_mark_invalid() and tb_is_invalid() tcg: Prepare TB invalidation for lockless TB lookup tcg: Avoid bouncing tb_lock between tb_gen_code() and tb_add_jump() tcg: Merge tb_find_slow() and tb_find_fast() tcg: rename tb_find_physical() cpu-exec.c | 117 +++++++++++++++++++++-------------------------- include/exec/exec-all.h | 16 +++++++ include/qemu/qht.h | 5 ++ target-alpha/cpu.h | 14 ++++++ target-arm/cpu.h | 14 ++++++ target-cris/cpu.h | 14 ++++++ target-i386/cpu.c | 3 -- target-i386/cpu.h | 20 ++++++-- target-i386/translate.c | 12 ++--- target-lm32/cpu.h | 14 ++++++ target-m68k/cpu.h | 14 ++++++ target-microblaze/cpu.h | 14 ++++++ target-mips/cpu.h | 14 ++++++ target-moxie/cpu.h | 14 ++++++ target-openrisc/cpu.h | 14 ++++++ target-ppc/cpu.h | 14 ++++++ target-s390x/cpu.h | 14 ++++++ target-sh4/cpu.h | 14 ++++++ target-sparc/cpu.h | 14 ++++++ target-sparc/translate.c | 1 + target-tilegx/cpu.h | 14 ++++++ target-tricore/cpu.h | 14 ++++++ target-unicore32/cpu.h | 14 ++++++ target-xtensa/cpu.h | 14 ++++++ translate-all.c | 29 ++++++------ util/qht.c | 7 ++- 26 files changed, 352 insertions(+), 96 deletions(-) -- 2.9.1