Adding following instructions:
moduw: Modulo Unsigned Word
modsw: Modulo Signed Word
Signed-off-by: Nikunj A Dadhania <nik...@linux.vnet.ibm.com>
---
target-ppc/helper.h | 2 ++
target-ppc/int_helper.c | 15 +++++++++++++++
target-ppc/translate.c | 19 +++++++++++++++++++
3 files changed, 36 insertions(+)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 1f5cfd0..76072fd 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -41,6 +41,8 @@ DEF_HELPER_FLAGS_1(cntlzw, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
+DEF_HELPER_FLAGS_2(modsw, TCG_CALL_NO_RWG_SE, i32, i32, i32)
+DEF_HELPER_FLAGS_2(moduw, TCG_CALL_NO_RWG_SE, i32, i32, i32)
DEF_HELPER_3(sraw, tl, env, tl, tl)
#if defined(TARGET_PPC64)
DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 7445376..631e0b4 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -139,6 +139,21 @@ uint64_t helper_divde(CPUPPCState *env, uint64_t rau,
uint64_t rbu, uint32_t oe)
#endif
+uint32_t helper_modsw(uint32_t rau, uint32_t rbu)
+{
+ int32_t ra = (int32_t) rau;
+ int32_t rb = (int32_t) rbu;
+
+ if ((rb == 0) || (ra == INT32_MIN && rb == -1)) {
+ return 0;
+ }
+ return ra % rb;
+}
+
+uint32_t helper_moduw(uint32_t ra, uint32_t rb)
+{
+ return rb ? ra % rb : 0;
+}
target_ulong helper_cntlzw(target_ulong t)
{
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 7e349e8..4348efd 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1175,6 +1175,23 @@ GEN_DIVE(divde, divde, 0);
GEN_DIVE(divdeo, divde, 1);
#endif
+#define GEN_INT_ARITH_MODW(name, opc3, sign) \
+static void glue(gen_, name)(DisasContext *ctx) \
+{ \
+ TCGv_i32 t0 = tcg_temp_new_i32(); \
+ TCGv_i32 t1 = tcg_temp_new_i32(); \
+ \
+ tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
+ tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]); \
+ gen_helper_##name(t0, t0 , t1); \
+ tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); \
+ tcg_temp_free_i32(t0); \
+ tcg_temp_free_i32(t1); \
+}
+
+GEN_INT_ARITH_MODW(moduw, 0x08, 0);
+GEN_INT_ARITH_MODW(modsw, 0x18, 1);
+
/* mulhw mulhw. */
static void gen_mulhw(DisasContext *ctx)
{
@@ -10241,6 +10258,8 @@ GEN_HANDLER_E(divwe, 0x1F, 0x0B, 0x0D, 0, PPC_NONE,
PPC2_DIVE_ISA206),
GEN_HANDLER_E(divweo, 0x1F, 0x0B, 0x1D, 0, PPC_NONE, PPC2_DIVE_ISA206),
GEN_HANDLER_E(divweu, 0x1F, 0x0B, 0x0C, 0, PPC_NONE, PPC2_DIVE_ISA206),
GEN_HANDLER_E(divweuo, 0x1F, 0x0B, 0x1C, 0, PPC_NONE, PPC2_DIVE_ISA206),
+GEN_HANDLER_E(modsw, 0x1F, 0x0B, 0x18, 0x00000001, PPC_NONE, PPC2_ISA300),
+GEN_HANDLER_E(moduw, 0x1F, 0x0B, 0x08, 0x00000001, PPC_NONE, PPC2_ISA300),
#if defined(TARGET_PPC64)
#undef GEN_INT_ARITH_DIVD
--
2.7.4
