From: Vijaya Kumar K <vijaya.ku...@cavium.com> The CPU MIDR_EL1 register is exposed to userspace for arm64 with the below patch. https://lkml.org/lkml/2016/7/8/467
Thunderx platform requires explicit prefetch instruction to provide prefetch hint. Using MIDR_EL1 information, provided by above kernel patch, prefetch is executed if the platform is Thunderx. The results of live migration time improvement is provided in commit message of patch 2. Note: Check for size of while prefetching beyond page is not added. Making this check is counter productive on performance of live migration. v1 => v2: - Rename util/cpuinfo.c as util/aarch64-cpuid.c - Introduced header file include/qemu/aarch64-cpuid.h - Place all arch specific code under define __aarch64__ and CONFIG_LINUX. - Used builtin_prefetch() to add prefetch instruction. - Moved arch specific changes out of generic code - Dropped prefetching 5th cache line. Vijaya Kumar K (2): utils: Add helper to read arm MIDR_EL1 register utils: Add prefetch for Thunderx platform include/qemu/aarch64-cpuid.h | 9 +++++ util/Makefile.objs | 1 + util/aarch64-cpuid.c | 94 ++++++++++++++++++++++++++++++++++++++++++++ util/cutils.c | 31 +++++++++++++++ 4 files changed, 135 insertions(+) create mode 100644 include/qemu/aarch64-cpuid.h create mode 100644 util/aarch64-cpuid.c -- 1.9.1