On Tue, Sep 13, 2016 at 10:50:06AM -0400, Brijesh Singh wrote:
> In SEV-enabled guest dma should be performed on shared pages. Since
> the SeaBIOS executes in non PAE mode and does not have access to C-bit
> to create a shared page hence disable the dma operation when reading
> from fw_cfg interface.
>
> Signed-off-by: Brijesh Singh <brijesh.si...@amd.com>
Why do we need new interfaces for this though? Just
set dma_enabled=false on command line.
> ---
> hw/nvram/fw_cfg.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
> index 6a68e59..aca99e9 100644
> --- a/hw/nvram/fw_cfg.c
> +++ b/hw/nvram/fw_cfg.c
> @@ -24,6 +24,7 @@
> #include "qemu/osdep.h"
> #include "hw/hw.h"
> #include "sysemu/sysemu.h"
> +#include "sysemu/kvm.h"
> #include "sysemu/dma.h"
> #include "hw/boards.h"
> #include "hw/isa/isa.h"
> @@ -1009,6 +1010,11 @@ static void fw_cfg_io_realize(DeviceState *dev, Error
> **errp)
> FWCfgIoState *s = FW_CFG_IO(dev);
> SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
>
> + /* disable dma on fw_cfg when SEV is enabled */
> + if (kvm_sev_enabled()) {
> + qdev_prop_set_bit(dev, "dma_enabled", false);
> + }
> +
> /* when using port i/o, the 8-bit data register ALWAYS overlaps
> * with half of the 16-bit control register. Hence, the total size
> * of the i/o region used is FW_CFG_CTL_SIZE */
