Richard Henderson <r...@twiddle.net> writes:
> Stop specializing on TARGET_LONG_BITS == 32; unconditionally allocate
> a temp and expand with tcg_gen_extu_i32_tl. Split out gen_aa32_addr,
> gen_aa32_frob64, gen_aa32_ld_i32 and gen_aa32_st_i32 as separate interfaces.
>
> Signed-off-by: Richard Henderson <r...@twiddle.net>
> ---
> target-arm/translate.c | 171
> +++++++++++++++++++------------------------------
> 1 file changed, 66 insertions(+), 105 deletions(-)
>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index bd5d5cb..1b5bf87 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -926,145 +926,106 @@ static inline void store_reg_from_load(DisasContext
> *s, int reg, TCGv_i32 var)
> * These functions work like tcg_gen_qemu_{ld,st}* except
> * that the address argument is TCGv_i32 rather than TCGv.
> */
<snip>
Phew diff made that quite hard to follow so I did a side-by-side ediff
instead:
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
--
Alex Bennée
