On Tue, Sep 20, 2016 at 10:30 AM, Peter Maydell
<peter.mayd...@linaro.org> wrote:
> On 19 September 2016 at 19:16, Alistair Francis
> <alistair.fran...@xilinx.com> wrote:
>> On Mon, Sep 19, 2016 at 11:08 AM, Peter Maydell
>> <peter.mayd...@linaro.org> wrote:
>>> On 28 July 2016 at 20:00, Alistair Francis <alistair.fran...@xilinx.com> 
>>> wrote:
>>>>
>>>> This patch series adds initial priority queue support to the Cadence GEM
>>>> device. This is based on original work by Peter C, that has been ported
>>>> to the latest version of QEMU.
>>>>
>>>> There is more GEM work that I'd like to upstream after this, but I
>>>> figured this a good place to start. I have done limited testing on the
>>>> Xilinx machine, including running some of our GEM regressions, although
>>>> they don't cover everything. I can't really think of too many other test
>>>> cases that I can run at the moment.
>>>
>>> Hi -- I just found this in a random mail folder I forgot to check
>>> very often -- I'm guessing it's still relevant and I should review/apply
>>> it to target-arm.next?
>>
>> Yes, you fully reviewed it during the 2.7 freeze. It should be ready
>> to apply to master now.
>
> Applied to target-arm.next, thanks (and sorry about the delay).

Great! No worries, I should have reminded you.

Thanks,

Alistair

>
> -- PMM
>

Reply via email to