On 26 September 2016 at 10:49, Alistair Francis <alistair.fran...@xilinx.com> wrote: > There was an error with some of the register implementation assuming > there are 16 priority queues supported when the IP only supports 8. This > patch corrects the registers to only support 8 queues. > > Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com> > Reported-by: Paolo Bonzini <pbonz...@redhat.com> > --- > Thanks to Paolo for pointing this out. > > hw/net/cadence_gem.c | 22 ++++------------------ > 1 file changed, 4 insertions(+), 18 deletions(-) > > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c > index 8618e7a..7915732 100644 > --- a/hw/net/cadence_gem.c > +++ b/hw/net/cadence_gem.c > @@ -147,25 +147,19 @@ > #define GEM_INT_Q1_MASK (0x00000640 / 4) > > #define GEM_TRANSMIT_Q1_PTR (0x00000440 / 4) > -#define GEM_TRANSMIT_Q15_PTR (GEM_TRANSMIT_Q1_PTR + 14) > +#define GEM_TRANSMIT_Q7_PTR (GEM_TRANSMIT_Q1_PTR + 6)
8 queues but they're numbered one to ... seven ?? thanks -- PMM
