On 12 October 2016 at 18:15, Michael Walle <mich...@walle.cc> wrote:
> The order of most opcodes with immediates was wrong (according to the
> reference manual) in the (debug) logging. Additionally, one operand for the
> andhi instruction was completly wrong. Fix these.
>
> Signed-off-by: Michael Walle <mich...@walle.cc>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
PS: the wcsr disassembly also looks to be wrong:
LOG_DIS("wcsr r%d, %d\n", dc->r1, dc->csr);
where the manual says this is "wcsr csr, rX"
(separate bug though really).
thanks
-- PMM
