Signed-off-by: Laurent Vivier <laur...@vivier.eu>
---
target-m68k/translate.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 0d3111d..a07b6f5 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2021,6 +2021,41 @@ DISAS_INSN(eor)
DEST_EA(env, insn, OS_LONG, dest, &addr);
}
+DISAS_INSN(exg)
+{
+ TCGv src;
+ TCGv reg;
+ TCGv dest;
+ int exg_mode;
+
+ exg_mode = insn & 0x1f8;
+
+ dest = tcg_temp_new();
+ switch (exg_mode) {
+ case 0x140:
+ /* exchange Dx and Dy */
+ src = DREG(insn, 9);
+ reg = DREG(insn, 0);
+ break;
+ case 0x148:
+ /* exchange Ax and Ay */
+ src = AREG(insn, 9);
+ reg = AREG(insn, 0);
+ break;
+ case 0x188:
+ /* exchange Dx and Ay */
+ src = DREG(insn, 9);
+ reg = AREG(insn, 0);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ tcg_gen_mov_i32(dest, src);
+ tcg_gen_mov_i32(src, reg);
+ tcg_gen_mov_i32(reg, dest);
+ tcg_temp_free(dest);
+}
+
DISAS_INSN(and)
{
TCGv src;
@@ -3154,6 +3189,12 @@ void register_m68k_insns (CPUM68KState *env)
INSN(cmpa, b0c0, f0c0, M68000);
INSN(eor, b180, f1c0, CF_ISA_A);
BASE(and, c000, f000);
+ INSN(undef, c140, f1f8, CF_ISA_A);
+ INSN(exg, c140, f1f8, M68000);
+ INSN(undef, c148, f1f8, CF_ISA_A);
+ INSN(exg, c148, f1f8, M68000);
+ INSN(undef, c188, f1f8, CF_ISA_A);
+ INSN(exg, c188, f1f8, M68000);
BASE(mulw, c0c0, f0c0);
BASE(addsub, d000, f000);
INSN(addx, d180, f1f8, CF_ISA_A);
--
2.7.4
