This series is another subset of the series I sent in May: https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg00501.html
It must be applied on top of series: "target-m68k: prepare to introduce 680x0 instruction set" This subset contains: - all the patches reviewed by Richard that needed no modification - some patches where the fix was easy - I've merged patches inlining addx/subx/negx and introducing their opcodes for 680x0. This subset introduces: - new instructions: bkpt, linkl, exg, dbCC - new operand size (byte and word) for some instructions: or, eor, and, add, sub, cmp, and instruciont with immediate data - add addressing modes to: not, neg, adda, suba - remove helpers for: addx, subx, negx I've checked it doesn't break coldfire support: http://wiki.qemu.org/download/coldfire-test-0.1.tar.bz2 but it can't boot a 680x0 processor kernel. v2: - split exg in exg_aa, exg_dd, exg_da - split dbcc/scc patch - add missing Richard's S-o-b in patch "Inline addx, subx, negx" - Add Richard's R-b in patch "introduce byte and word cc_ops" Laurent Vivier (16): target-m68k: add bkpt instruction target-m68k: add linkl target-m68k: add exg ops target-m68k: add addressing modes to scc target-m68k: add dbcc target-m68k: add addressing modes to not target-m68k: eor can manage word and byte operands target-m68k: or can manage word and byte operands target-m68k: and can manage word and byte operands target-m68k: suba/adda can manage word operand target-m68k: some bit ops cleanup target-m68k: introduce byte and word cc_ops target-m68k: add addressing modes to neg target-m68k: add/sub manage word and byte operands target-m68k: cmp manages word and bytes operands target-m68k: immediate ops manage word and byte operands Richard Henderson (1): target-m68k: Inline addx, subx, negx target-m68k/cpu.h | 6 +- target-m68k/helper.c | 65 ++--- target-m68k/helper.h | 2 - target-m68k/translate.c | 679 ++++++++++++++++++++++++++++++++++-------------- 4 files changed, 505 insertions(+), 247 deletions(-) -- 2.7.4
