On Wed, Jan 25, 2017 at 09:03:55PM +0200, Marcel Apfelbaum wrote: > v3 -> v4: > - Rebased on master.
No need for this. Pls check that my pci branch is ok. > v2 -> v3: > - Keep only the root port base class code in pcie_root_port.c (Michael) > - Use msix for the generic root port implementation (Michael and Gerd) > - The task required some refactoring like having some common > init/uninit interrupts functions to be implemented by both > generic and Intel Root Ports. > > v1 -> v2: > - Rebased on master. > > The Generic Root Port behaves the same as the > Intel's IOH device with id 3420, without having > Intel specific attributes. > > The device has two purposes: > (1) Can be used on both X86 and ARM machines. > (2) It will allow us to tweak the behaviour > (e.g add vendor-specific PCI capabilities) > - something that obviously cannot be done > on a known device. > > Patch 1/3: Introduce a base class for Root Ports - most of the code > is migrated from IOH3420 implementation. > Patch 2/3: Derives the IOH3420 from the new base class > Patch 3/3: Introduces the generic Root Port. > > Tested with Linux and Windows guests only on x86 hosts. > > Marcel Apfelbaum (3): > hw/pcie: Introduce a base class for PCI Express Root Ports > hw/ioh3420: derive from PCI Express Root Port base class > hw/pcie: Introduce Generic PCI Express Root Port > > default-configs/arm-softmmu.mak | 1 + > default-configs/i386-softmmu.mak | 1 + > default-configs/x86_64-softmmu.mak | 1 + > hw/pci-bridge/Makefile.objs | 1 + > hw/pci-bridge/gen_pcie_root_port.c | 88 +++++++++++++++++++ > hw/pci-bridge/ioh3420.c | 121 ++++---------------------- > hw/pci-bridge/pcie_root_port.c | 171 > +++++++++++++++++++++++++++++++++++++ > include/hw/pci/pci.h | 1 + > include/hw/pci/pcie_port.h | 19 +++++ > 9 files changed, 298 insertions(+), 106 deletions(-) > create mode 100644 hw/pci-bridge/gen_pcie_root_port.c > create mode 100644 hw/pci-bridge/pcie_root_port.c > > -- > 2.5.5
