Signed-off-by: Laurent Vivier <laur...@vivier.eu> --- target/m68k/fpu_helper.c | 21 +++++++++++++++++++++ target/m68k/helper.h | 1 + target/m68k/translate.c | 15 +++++++++++++++ 3 files changed, 37 insertions(+)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 95d5cc4..9b9d9aa 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -95,6 +95,12 @@ static floatx80 FP1_to_floatx80(CPUM68KState *env) return (floatx80){ .low = env->fp1l, .high = env->fp1h }; } +static void floatx80_to_FP1(CPUM68KState *env, floatx80 res) +{ + env->fp1l = res.low; + env->fp1h = res.high; +} + void HELPER(exts32_FP0)(CPUM68KState *env) { floatx80 res; @@ -949,3 +955,18 @@ void HELPER(cos_FP0)(CPUM68KState *env) res = ldouble_to_floatx80(val); floatx80_to_FP0(env, res); } + +void HELPER(sincos_FP0_FP1)(CPUM68KState *env) +{ + floatx80 res; + long double val, valsin, valcos; + + val = floatx80_to_ldouble(FP0_to_floatx80(env)); + + sincosl(val, &valsin, &valcos); + res = ldouble_to_floatx80(valsin); + floatx80_to_FP0(env, res); + res = ldouble_to_floatx80(valcos); + floatx80_to_FP1(env, res); + +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 600a9a6..16f3370 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -69,6 +69,7 @@ DEF_HELPER_1(log10_FP0, void, env) DEF_HELPER_1(cosh_FP0, void, env) DEF_HELPER_1(acos_FP0, void, env) DEF_HELPER_1(cos_FP0, void, env) +DEF_HELPER_1(sincos_FP0_FP1, void, env) DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 7af88a2..cb4d9ce 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -923,6 +923,14 @@ static void gen_op_load_fpr_FP1(int freg) offsetof(CPUM68KState, fregs[freg].l.lower)); } +static void gen_op_store_fpr_FP1(int freg) +{ + tcg_gen_st16_i32(QREG_FP1H, cpu_env, + offsetof(CPUM68KState, fregs[freg].l.upper)); + tcg_gen_st_i64(QREG_FP1L, cpu_env, + offsetof(CPUM68KState, fregs[freg].l.lower)); +} + static void gen_extend_FP0(int opsize) { switch (opsize) { @@ -4773,6 +4781,13 @@ DISAS_INSN(fpu) gen_op_load_fpr_FP1(REG(ext, 7)); gen_helper_dsub_FP0_FP1(cpu_env); break; + case 0x30: case 0x31: case 0x32: + case 0x33: case 0x34: case 0x35: + case 0x36: case 0x37: + gen_helper_sincos_FP0_FP1(cpu_env); + gen_op_store_fpr_FP0(REG(ext, 7)); /* sin */ + gen_op_store_fpr_FP1(REG(ext, 0)); /* cos */ + break; case 0x38: /* fcmp */ gen_op_load_fpr_FP1(REG(ext, 7)); gen_helper_cmp_FP0_FP1(cpu_env); -- 2.9.3