Peter Maydell <peter.mayd...@linaro.org> writes:
> From: Michael Davidsaver <mdavidsa...@gmail.com>
>
> The VECTCLRACTIVE and VECTRESET bits in the AIRCR are both
> documented as UNPREDICTABLE if you write a 1 to them when
> the processor is not halted in Debug state (ie stopped
> and under the control of an external JTAG debugger).
> Since we don't implement Debug state or emulated JTAG
> these bits are always UNPREDICTABLE for us. Instead of
> logging them as unimplemented we can simply log writes
> as guest errors and ignore them.
>
> Signed-off-by: Michael Davidsaver <mdavidsa...@gmail.com>
> [PMM: change extracted from another patch; commit message
> constructed from scratch]
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
> ---
> hw/intc/armv7m_nvic.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
> index 7b61fe6..18c0e60 100644
> --- a/hw/intc/armv7m_nvic.c
> +++ b/hw/intc/armv7m_nvic.c
> @@ -698,10 +698,14 @@ static void nvic_writel(NVICState *s, uint32_t offset,
> uint32_t value)
> qemu_irq_pulse(s->sysresetreq);
> }
> if (value & 2) {
> - qemu_log_mask(LOG_UNIMP, "VECTCLRACTIVE unimplemented\n");
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "Setting VECTCLRACTIVE when not in DEBUG mode "
> + "is UNPREDICTABLE\n");
> }
> if (value & 1) {
> - qemu_log_mask(LOG_UNIMP, "AIRCR system reset
> unimplemented\n");
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "Setting VECTRESET when not in DEBUG mode "
> + "is UNPREDICTABLE\n");
> }
> s->prigroup = extract32(value, 8, 3);
> nvic_irq_update(s);
--
Alex Bennée
