On Fri, Feb 17, 2017 at 5:21 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 14 February 2017 at 18:52, P J P <ppan...@redhat.com> wrote: >> From: Prasad J Pandit <p...@fedoraproject.org> >> >> Hello, >> >> In SDHCI protocol, the 'Block Count Enable' bit of the Transfer Mode >> register is used to control 's->blkcnt' value. This bit is not relevant >> in single block transfers. Also, Transfer Mode register value could be >> set such that 's->blkcnt' would not see an update during multi block >> transfers. Thus leading to an infinite loop. >> >> This patch set attempts to correct 'Block Count Enable' bit usage. >> >> This series incorporates changes suggested in patch set v3: >> -> https://lists.gnu.org/archive/html/qemu-devel/2017-02/msg02376.html >> -> https://lists.gnu.org/archive/html/qemu-devel/2017-02/msg02905.html > > I've gone back through the mail archives for previous versions of > this series, and I think that we just need review for patch 4 now?
Thanks Peter, I thought I had reviewed all of them. I just reviewed patch 4, these should be good to go now then. Thanks, Alistair > > thanks > -- PMM